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v2.18 DFIM Control - S-Function - eHS Gen4
Description
This model illustrates the closed-loop control of Doubly Fed Induction Machine (DFIM) using back-to-back PWM converters developed in Schematic Editor software and solved using the eHS solver. This example is based on OPAL-RT's real-time simulator, which has CPU and FPGA as two major processing units: the DFIM and the converter are simulated on FPGA and the controller is simulated on CPU in real-time. One RT-LAB model and one Schematic Editor model is provided to illustrate the exchange of information between the controller and plant. This example comprises two RT-LAB projects: a first one using a linear model for DFIM, where the saturation effects are neglected, and a second one using a DFIM with saturation model.
In S-Function workflow, example models support any chassis. You can contextualize your example model by selecting the chassis in the Chassis selection block.
SCHEMATIC EDITOR S-function OP4512 OP4610 OP5607 OP5707
Requirements
The RT-LAB, Schematic Editor and eFPGASIM toolboxes must be installed on the host and target computers in order to run this example model properly. Please refer to the product documentation for details on version compatibility.
Setup Parameters
This model must be run with both the Hardware Synchronized and XHP modes enabled. The firmware used in this model is generated using the RT-XSG tool, and it can be modified to generate firmware to fit another I/O hardware configuration. The CPU model simulation time step is set to 20 microseconds and all the variables required for controller is defined in the "ParameterInitialization.m" file that is automatically loaded during simulation.
DB37 pin-based digital loop-back cable must be connected at the rear side of the simulator to transfer the gating pulses.
Procedure
RT-LAB model with eHS interface
Run this demo for linear or saturable machine
Linear machine :
efsOpenExample('DFIM_SFUN_rtlab_SE_IO');
Saturable machine :
efsOpenExample('DFIM_SAT_SFUN_rtlab_SE_IO');
The following procedure will help the user understand the functionality and linking between eFPGASIM, RT-LAB and Schematic Editor. A Hardware-in-the-loop based RT-LAB model, "DFIM_SFUN_rtlab_SE_IO", is provided to illustrate the exchange of information between the controller and plant.
Click on "Run this demo" at the top of this section. The RT-LAB model will open automatically.
The RT-LAB model consists of a master subsystem (i.e. "sm_computation") and a console subsystem (i.e. "sc_user_interface").
The master subsystem has power network interface ("eHS_SE_SFunction_Drivers") and control of the machine
The console subsystem is used to control set points, such as magnitude and frequency of source voltages, speed reference, mechanical torque, and control activation during real-time simulation. Users can also monitor voltages, currents, machine torque and speed of the machine at any point during the simulation. For this example the role of each set points are as following:
Steps
Vdc_Ref: This sets the DC bus reference voltage for the outer loop of grid side converter control.
Kp Ki rotor: These are the Kp and Ki values of outer loop active and reactive power control of the rotor side converter control.
Kp Ki DC-link: These are the Kp and Ki values of inner loop active and reactive power control of grid side converter control.
Iq_related: This generates Iq reference value manually when PQ control of rotor side converter is disabled.
P ref: This block is used to set reference active power in PU to the rotor side converter outer loop control. This block holds a feature of generating reference value as a constant or a square wave with perturbation or a triangular wave with perturbation.
Q ref: This block is used to set reference reactive power in PU to the rotor side converter outer loop control
PQ_Control: This block, upon setting a value 0, enables all controls with respect to back-to-back PWM converters. It disables active and reactive power control of rotor side converter upon setting its value to 1. The value of Iq is given manually from "Iq_related".
Rotor speed: The rotor speed of DFIM is set in per unit.
Rotor speed type: The rotor speed continuously varies between sub and super synchronous mode upon setting a value 0. If the value is set to 1 then the speed mentioned in "Rotor speed" is considered.
Frequency: Grid frequency
The "eHS_SE_SFunction_Drivers" solver solves the power network built using schematic editor software during the real time simulation. The circuit built in schematic editor can be edited or viewed by choosing the edit option available in the solver block.
eFPGASIM allows to simulate two different models for the doubly-fed induction machine:
linear (or unsaturated) induction machine;
saturated induction machine.
In the linear machine model the effects of magnetic saturation are neglected, in contrast with the induction machine with saturation, where these effects are taken into account. Each model has its own block in OPAL-RT Schematic Editor Library Browser, with different parameters to be set, as shown in the figures below.
This example provides two RT-LAB projects, each containing one of these machine models, and their results are presented in a following section.
When the model is compiled in Simulink, the configuration of the eHS solver will be generated according to the schematic editor circuit characteristics. Elements will be put into matrices and stored in .mat files that will be transferred into the solver when the model is run from the RT-LAB interface. Matrices are generated during model compilation in RT-LAB.
Back-to-back converter control of DFIM is implemented on the CPU which runs at a sampling time of 20 micro-sec.
Rotor side converter (RSC) shown below provides the excitation for the induction machine rotor. With this PWM converter it is possible to control the torque, hence the real power, and power factor at the stator terminals. The DFIM is controlled in a synchronously rotating dq axis frame, with d axis oriented along the stator flux vector position. In this way a decoupled control between the electrical torque and the rotor excitation current is obtained. Consequently, the active and reactive power are controlled independently.
Reference: Dr John Fletcher and Jin Yang "Introduction to Doubly-Fed Induction Generator for Wind Power Applications"
Grid side converter (GSC) control shown below controls the flow of real and reactive power to the grid. The objective of GSC is to keep the DC Link voltage constant regardless of the magnitude and direction of the rotor power flow. The vector control method is used with the reference frame oriented along the stator voltage vector position, enabling independent control of the active and reactive power flowing between the grid and the GSC.
Reference: Dr John Fletcher and Jin Yang "Introduction to Doubly-Fed Induction Generator for Wind Power Applications"
Modulating waveforms generated by the controller are converterd to PWM via pwmo IO block of OPAL-RT. These pwm pulses are fed back through digital loop-back cable to fire the eHS converter internally. Here, the gating pulses are chosen to receive from Digital In card of the OPAL-RT simulator. Here, to receive the pwm in schematic editor, slot 2A channels 00 to 05 and 08 to 13 are configured.
The OPAL-RT hardware chasis and FPGA module has to be chosen in the schematic editor prior to the building of the model. Goto: File - Simulator Setup - Choose the Simulator - Choose the Firmware. Mark the "Use this setup" to fit your simulation requirement.
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