Documentation Home Page ◇ MMC Home Page
Pour la documentation en FRANÇAIS, utilisez l'outil de traduction de votre navigateur Chrome, Edge ou Safari. Voir un exemple.
MMC Release Notes
Page Content
- 1 Version 2.15.0
- 2 Version 2.14.0
- 2.1 Features
- 3 Version 2.13.0
- 4 Version 2.12.0
- 4.1 Features
- 5 Version 2.11.0
- 5.1 Features
- 6 Version 2.10.0
- 6.1 Features
- 6.2 Deprecation and Removals
- 7 Version 2.9.0
- 7.1 Features
- 7.2 Deprecation and Removals
- 8 Version 2.8.0
- 8.1 Features
- 8.2 Deprecation and Removals
- 9 Version 2.7.0
- 9.1 Features
- 9.2 Bug fixes
- 9.3 Deprecation and Removals
- 10 Version 2.6.0
- 11 Version 2.5.0
- 12 Version 2.4.0
- 13 Version 2.3.0
- 14 Version 2.2.0
- 14.1 Features
- 15 Version 2.1.0
- 15.1 Features
- 16 Version 2.0.0
- 16.1 Features
- 16.2 Bug fixes
- 16.3 Deprecation and Removals
- 17 Version 1.0.0
- 17.1 Features
Version 2.15.0
Added
Support for MATLAB 2024b: Compatibility with the MATLAB release 2024b.
Improved
The MMC_HVDC_Bipole model can be opened via the MATLAB Documentation page.
Removed
The MATLAB version 2018b, and 2021a are deprecated (2018b is still supported for RTXSG models).
Version 2.14.0
Features
Added bitstream of Versal FPGA VM1402 and updated bitstreams including new features, e.g. SM dc current injection, individual control of fast discharge of SM in FPGA.
Improved MTDC MMC demo, i.e. changing the slack bus from dc bus 2 to bus 1 for better system performance in some operating scenarios.
Version 2.13.0
Added
Added HVDC Bipole example to the library. It supports simulation on CPU or FPGA
Added a VSC example to demonstrate a more precise method to generate pulses for power converters by considering inter step events
Improved
Updated the HVDC MMC Point to Point. Now the user can select the type of simulation (CPU or FPGA) inside the model with a configuration block
Improved the selection of OpCntrl and OpLnk on the MMC Valves block and the MMC Valves Low Level Control block
Improved the performance of PWM and Deadtime blocks was improved.
Changed the VSC_param block: For VSC example models or custom models using this block, please ensure/crosscheck is rightly configured
Removed
Removed Matlab 2019b support
Removed Redhat 32 bits supported
Version 2.12.0
Features
The MTDC HVDC examples was updated. In the same model the user can select FPGA or CPU implementation.
Carrier generator block was updated to provide frequency as input and not only as parameter.
Version 2.11.0
Features
The STATCOM and M3C examples were updated. In the same model the user can
select FPGA or CPU implementation using the initialization script. This is achieved by
new MMC Valves block in the libraryMatlab 2023b is supported
Two new firmwares added for MMC, supporting 12 SFP cables connected to either
plant or control side only
Version 2.10.0
Features
MMC valves blocks were included in the library
The MMC HVDC example was updated. This is a point-to-point HVDC link, now in the same model
the user can select FPGA or CPU implementation using the initialization script. This is
achieved by new MMC Valves block in the libraryThe added MMC Valves blocks can be used for different applications and are more
flexible and easy to use that previous library version
Deprecation and Removals
Dropped support for the MMC4 models. They were removed.
Version 2.9.0
Features
Matlab 2022b and 2023a are supported.
A new MMC matrix converter CPU demo is added.
Deprecation and Removals
Dropped support of the following Matlab versions: 2018a.
Version 2.8.0
Features
Matlab 2022a is supported.
Vivado 2019.1 and later versions are supported.
Deprecation and Removals
Dropped support of the following Matlab versions: 2015b, 2016a/b, and 2017a/b.
Dropped support of Vivado 2018 and earlier versions.
Version 2.7.0
Features
Matlab 2021a/b are supported.
Bug fixes
Fixed the bug that in MMC FPGA model, the total voltage drop on IGBT Ron is wrong when the value is larger than 512 V. If the customer uses pregenerated bitstream from previous version, they need to replace the bitstream with the one comes in this version. If the customer uses bitstream generated from their own RTXSG model, they will need to re-generate new bitstream in this version to fix the bug.
Deprecation and Removals
Due to above bug, bitstreams of previous version are removed and replaced with new bitstreams.
Version 2.6.0
Features
VSC switch thermal model block is added in library.
Bug fixes
Fixed the bug that Compilation failed using gcc on OPAL-RTLinux due to two incompatible S-functions.
Version 2.5.0
Features
A new SST demo added.
The 6-IGBT NPC SM type is supported.
Block help is linked to wiki webpages.
Bug fixes
Fixed the bug that in VSC model, the external capacitors with upper/lower capacitors give wrong results.
Version 2.4.0
Features
Bug fixes
Version 2.3.0
Features
Bug fixes
Version 2.2.0
Features
Added new demo of VSC switching function -- TSB AC/AC Converter in CPU.
Added new demo of MMC HVDC in CPU, it combines MMC CPU detailed model and average model in one demo.
Added MMC RT-XSG model for the demo bitstream.
Version 2.1.0
Features
Support for new Matlab versions. Add support of Matlab 2019a and Matlab 2019b.
Version 2.0.0
Features
Support for new MATLAB versions. The official list is now 2015b, 2016a, 2016b, 2017a, 2017b, 2018a and 2018b.
Support Sub-module states transmission in new protocol in MMC FPGA models. Please note in this version no protocol communication is supported in OP4510.
Bug fixes
Version of MMC showing in MATLAB command window when the command 'ver' is given.
Reworked the libraries displayed in the Simulink Library Browser.
Updated MMC unitary test procedure.
Added documentation for RT-XSG blocks which are inside the MMC library.
Fixed the bug that MMC demos cannot be compiled on windows target.
Added all MMC examples in RTLAB New Project wizard (supported with RTLAB 2019.3 and above).
Deprecation and Removals
Dropped support of the following Matlab versions: 2011b, 2012b, 2013b and 2014b.
Version 1.0.0
Features
MMC6 Hybrid MMC models in FPGA are available. The MMC can have up to three types of SM (e.g. Half-bridge sub-module (HBSM), Full bridge sub-module (FBSM), Clamped double sub-module (CDSM), or T-Type sub-module) in one valve.
MMC6 Hybrid MMC RT-XSG model and bitstream compilation are only available in Xilinx Vivado.
This MMC version supports FPGA types OP7020, OP5607 and OP4510.
Software Artemis 7.2.1 and upper, RTLAB 11.2.1 and upper and RT-EVENT are needed to run MMC demos.
This MMC version supports Matlab 2011b, 2012b, 2014b, 2015b and 2016b.
OPAL-RT TECHNOLOGIES, Inc. | 1751, rue Richardson, bureau 1060 | Montréal, Québec Canada H3K 1G6 | opal-rt.com | +1 514-935-2323
Follow OPAL-RT: LinkedIn | Facebook | YouTube | X/Twitter