Documentation Home Page ◇ Power Electronics Add-On for NI VeriStand Home Page
Pour la documentation en FRANÇAIS, utilisez l'outil de traduction de votre navigateur Chrome, Edge ou Safari. Voir un exemple.

How to Validate PWM and Static Digital Input Signals

Owned by Sylvain Ménard
Last updated: Aug 30, 2023 by Pierre-Luc Renault
2 min read

Prerequisites

How to Add the Power Electronics Add-On to the System Definition

How to Select a Hardware Configuration

Procedure

When interfacing the test system with external hardware, it is important to confirm that the signals input to the real time target are properly received and interpreted by the simulation software. In the case of a HIL system, we may need to validate both static digital signals and PWM gating signals acquired by the Digital Input channels. Follow the procedure below to monitor Digital Input channel data in the Power Electronics Add-On.

  1. Follow the steps in the Prerequisite articles to create a VeriStand project with the Power Electronics Add-On and select a Hardware Configuration with support for digital input channels.

  2. Refer to the documentation for the selected Hardware Configuration to confirm the supported digital input voltage range and to associate the physical pins on the card to the Digital Input Channel names in VeriStand.

  3. Connect digital signals to the digital input channels of the FPGA board.

  4. In VeriStand, open the System Definition file and navigate to Power Electronics Add-On >> Hardware Configuration >> FPGAX >> Digital Inputs.

  5. Under Digital Input Settings, select Enable PWM Measurement Channels. A folder called Advanced will be created under the Digital Inputs section of the tree.

  6. Save and close the System Definition File.

  7. Open or create a Screen (.nivsscr) file in the VeriStand project and add numeric indicators to monitor the desired Digital Input channels.

  8. To monitor a PWM signal acquired on a Digital Input channel, map a numeric indicator to the corresponding Duty Cycle and Frequency channels under Hardware Configuration >> FPGA X >> Digital Inputs >> Advanced.

  9. To monitor a static (non-PWM) signal acquired on a Digital Input channel, map a numeric indicator to the appropriate VeriStand channel in the Digital Inputs section of the tree (DI00, DI01, etc.).

  10. Deploy the simulation and monitor the signals in the user interface. Verify that the PWM signals are operating at the expected duty cycle and frequency. Static signals will display a 1 when HIGH and a 0 when LOW.

Digital Inputs Section

Supported Hardware Configurations

OPAL-RT TECHNOLOGIES, Inc. | 1751, rue Richardson, bureau 1060 | Montréal, Québec Canada H3K 1G6 | opal-rt.com | +1 514-935-2323