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[v2] Festo 8857 Inverter and Encoder Integration Validation

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[v2] Festo 8857 Inverter and Encoder Integration Validation

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Objective

  • Validate the interface provided by OP8219 between the dynamometer encoder module and the OPAL-RT simulator

  • Validate the interface provided by OP8219 between the 8857/37 inverter modules (gate signals) and the OPAL-RT simulator

Description

This section presents integration of the Festo 2 kW dynamometer encoder module and 8857/37 inverters into OPAL-RT simulator using OP8219 inverter/decoder interface unit and OP8662 high voltage and current measurement unit.
The user is presented with a SIMULINK-based model to perform a basic operation of the dynamometer encoder module and Festo 8857/37 inverter.

Model Overview

The RT-LAB model depicted in figure 1 consists of two subsystems.

  • The SM_OP5707” subsystem includes the model that runs on the real-time simulator

  • The SC_Offline_User_Interface” subsystem presents the user interface that runs on the host PC.

Figure 1: RT-LAB model overview

The subsystem consists of five areas as shown in figure 2:

  • The blue area (PWM Enable (Module 1, 2)) enables the PWM signals of the inverter modules

  • The green area (Frequency Reference (Module 1, 2)) is dedicated to adjusting the switching frequency of the inverter modules

  • The yellow areas (Duty Cycle Reference (Module-1)) and orange (Duty Cycle Reference (Module-2)) areas are used to set individual modulation indexes for each leg of the inverter modules.

  • The gray area (Signal Monitoring) is the block for receiving and monitoring data from the OPAL-RT simulator

Figure 2: Contents inside the SC_Offline_User_Interface subsystem

The SM_OP5707 subsystem has two main blocks, including OP5707 IO Interface and PWM_GENERATION, as shown in figure 3:

  • The OP5707 IO Interface is used to interface the PWMs, voltages, current measurements, and encoder signals

  • The PWM_GENERATION generates the PWM signals for the inverter modules based on the modulation index and switching frequency set by the user

Figure 3: Contents inside the SM_OP5707 subsystem

Connection Diagrams

Power off equipment before connecting any cable. See the Test Procedure below.

  • The connections of the OP5707 to the OP8662 and to the OP8219 are demonstrated in figure 4. The encoder terminal (DB9F) of the dynamometer needs to be connected to the encoder input (DB9F) of the OP8219 to measure the speed and position of the WRIM (DFIG). Connections must be performed as shown in figure 4.

image-20250106-141343.png
Figure 4: Signal connections diagram
  • The connections of the Festo 8857 inverter, OPAL-RT OP8662, and OPAL-RT OP8219 are illustrated in figure 5.
    The user must respect the direction and location of the measurement depicted in figure 5.

image-20250106-160545.png
Figure 5: Connections between the Festo 8857 inverter and OPAL-RT OP8662 connection
  • The encoder connection between OPAL-RT OP8219 and Festo 8540 dynamometer is presented in figure 6.

image-20250106-173544.png
Figure 6: Block diagram of the encoder connection to the OP8219
  •  The control connections (PWM) using the provided DB9 cables between OPAL-RT OP8219 and Festo 8857 inverters is also presented in figure 7.

image-20250106-173756.png
Figure 7: Block diagram of the control connection (PWM) to the OP8219

Test Procedure

  • Ensure that all power source outputs are off (see figure 8 below).

  • Connect the system power circuit and connection signals as shown in figures 4 to 7.

  • Powered on the OP8662

Figure 8: OP8662 power button
  • Ensure that the power adaptor is connected to the OP8219 (figure 9).

Figure 9: Power adaptor connector for OP8219
  • Ensure that the Festo inverter modules 8857 are powered on using the 24 V AC voltage provided by the Festo power supply 8525 (figure 10).

Figure 10: Festo 8857 power button
  • Ensure that the 120 Ω resistive load Festo 8509 is switched on.

Figure 11: Festo 8509 resistive load
  • Ensure that the jumpers are always installed on the OPAL-RT OP8219 board (figure 12).
    For all tests using OP8219, the jumpers need to be installed, unless otherwise stated.

Figure 12: Jumpers connections for the PWM signals
  • Launch RT-LAB.

  • Import the model zip file in RT-LAB (see below).

  • Build, load, and execute the model.

  • Adjust the variable voltage knob to establish an AC voltage level with the amplitude of 80 Vpeak (Line-to-line voltage).

Figure 13: The variable voltage knob
  • The following measured voltages and currents are shown in the RT-LAB scopes (figures 14 to 16).

Figure 14: Measured voltages in the RT-LAB scope
Figure 15: Measured currents in the RT-LAB scope
Figure 16: The voltage and current measured by the oscilloscope
  • The PWM signals are enabled for the 3-phase inverter Festo 8857 modules 1 and 2 by changing the reference from ’0′ to ’1′ (figure 17)

Figure 17: The PWM enables block
  • The modulation references for the Festo 8857 inverter should read “0.5” as shown in the following figure for modules 1 and 2. If not, set the references as so.

Figure 18: Start inverter modulation amplitude
  • Set the reference frequency to ’4000′ for modules 1 and 2.

Figure 19: Switching frequency of the inverters
  • The measured PWM signals of the Festo 8857 inverter (module 1 or 2) approximately match the settings as shown in figure 20.

Figure 20: PWM signals measured by the oscilloscope
  • Turn on the Festo 8540 dynamometer and set it to “Speed Mode” at 2500 rpm in the forward direction.

Figure 21: The Festo 8540 dynamometer
  • The following results can be observed for the measured speed, position, and direction, respectively.

Figure 22: the measured speed, position, and direction
  • To stop the model:

    • Disable the PWMs for the 3-phase inverter modules by setting the “PWM Enable Module1,2″ from ’1′ to ’0

    • Turn the variable voltage knob to ‘0 V

    • Reduce the speed to zero and stop the dynamometer

    • Turn off the inverter module 8525, 8219 and OP8662.

    • Reset the model in RT-LAB

Conclusion

Based on the preceding tests, the hardware and software included in Festo’s models are declared fully functional and compliant with OPAL-RT specifications.

Model (Zip File)

The firmware is provided in themodel below is for OP4512 (AMD Kintex™-7, 325T FPGA) the OP5707/OP5707XG (AMD/Xilinx Virtex™ 7 FPGA VC707) simulators only. For firmware for other compatible OPAL-RT simulators, please contact your local sale representative.

  File Modified

ZIP Archive OP5707_OP8219_INTEGRATION.zip

Jan 07, 2025 by Sylvain Ménard

 

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