Inserting Custom VHDL Files into a Model

The easiest way to include custom VHDL into an RT-XSG model is to use the System Generator for DSP ‘Blackbox‘ block. Refer to the System Generator for DSP documentation for details on how to use this block.

Note: During compilation, the RT-XSG toolbox uses a copy of the RT-XSG model to generate the configuration file. This compilation is run in a temporary folder to prevent any file corruption. As a result, the VHDL file location in the M configuration file of the black box must be specified as an absolute path, instead of the default relative path.

Note: Any non-VHDL generation (e.g. DCP files) that must be available during compilation are to be placed in the model folder prior to the configuration file generation.