Documentation Home Page ARTEMiS Home Page
Pour la documentation en FRANÇAIS, utilisez l'outil de traduction de votre navigateur Chrome, Edge ou Safari. Voir un exemple.

Inner Control Loop Three Phase

Page Content

The Inner Control Loop block generates the reference control signal for the Reference Generation Block in the d-q coordinate. The inner Control Loop block responds according to the angular frequency, phase angle, and magnitude of the virtual voltage source set by the outer control loop. Two inner control loop structures for grid forming (GFM) converter, i.e., single-loop control and Double-loop control, have been included in the Inner Control Loop block. The fundamental difference between the single-loop and the Double-loop control structure is that the former controls the angular frequency and magnitude of the inverter’s virtual internal voltage source, whereas the latter controls the angular frequency and the magnitude of the filter’s capacitor voltage. Another crucial difference is that Single-loop control includes only the voltage control loop, whereas Double-loop control includes both the voltage and current control loops.  Due to the absence of a current control loop, Single Loop Control may flow excessive current during larger disturbances. Virtual impedance has been integrated with the Single Loop Control approach to limit the current flow. On the contrary, Double Loop Control adopts the Current saturation technique to limit the current flow.

Mask and Parameters

Mask Parameters vary with the selection of Inner Control Loop Type. For Single Loop Inner Control Loop, following information are required by the configuration mask of the Inner Control Loop block.

Parameter

Description

Units

Voltage Loop Integral Gain

Integral Gain of the Voltage control Loop

pu/s

Virtual Impedance Gain

Virtual impedance gain. This parameter limits the inverter current during fault.

pu

Threshold Current

Maximum Current Limit

pu

Sample Time

Input sampling period

sec

If Double Loop Control is chosen as the Inner Control Loop, the following information is required by the configuration mask of the Inner Control Loop block.

Parameter

Description

Units

Nominal Power

Nominal Capacity of the Inverter

VA

Nominal Operating Voltage

Nominal Line-to-Line RMS voltage of the inverter

V

Nominal Frequency

Nominal Operating frequency of the Inverter

Hz

Voltage Loop Gains (Kp)

Proportional Gain of the Voltage Control Loop

pu

Voltage Loop Gains (Ki)

Integral Gain of the Voltage Control Loop

pu/s

Current Loop Gains (Kp)

Proportional Gain of the Current Control Loop

pu

Current Loop Gains (Ki)

Integral Gain of the Current Control Loop

pu/s

Output Current Feed Forward Gain

Current Feed Forward gain of the voltage control Loop

pu

Filtering Inductance

Total Inductance of the filter

H

Internal Resistance of the Filtering Inductor

Total Intrinsic resistance of the filtering Inductor

Ohm

Filtering Capacitance

Total Capacitance of the Filter

F

Current Limit

Maximum Current limit

pu

Sample Time

Input sampling period

sec

Inputs, Outputs, and Signals Available for Monitoring

Inputs

Parameter

Description

UNITS

Vdref

d-axis reference magnitude of the virtual voltage source. For single Loop Control, this is the reference voltage at the inverter terminal; for Double-loop Control, this is the reference voltage across the capacitor of the filter.

Pu

Iodq

Direct and Quadrature axis current at the output

Pu

Vodq

Direct and Quadrature axis voltage at the output

Pu

Omega

Angular Velocity

Pu

Iinvdq

Direct and Quadrature axis current at the inverter side inductor of the filter

pu

Reset

Reset Signal

-

Outputs

Parameter

Description

UNITS

Vdq_ref

Direct and Quadrature axis Reference Control Signal

pu

Description

The Inner Control Loop contains two conventionally adopted Inner Control Loop approaches, i.e., single-loop control and Double-Loop Control. Brief descriptions of the adopted Inner Control Loop approaches are as follows.

Single Loop Control

This Inner Loop Control approach adopts only a voltage feedback loop; no current feedback loop is present here. The control architecture of the single-loop control is shown below.

In the figure,  Vref is the reference voltage, usually set by the Outer Control Loop, Vo is the output voltage, measured across the filtering capacitor of the inverter.  Vtd*and Vtq*  are the initial d and q axis reference control signal, final references are selected based on the settings of the virtual impedance.

Due to the absence of current feedback control, this control loop tends to flow excessive current during larger disturbances. To limit the current flow, virtual impedance has been integrated with the single loop control. A short description of the adopted virtual impedance method is given below.

Virtual Impedance

When a fault occurs, the impedance seen by the grid-forming inverter suddenly decreases. Due to the voltage source behavior of the GFM inverter, it tries to control the voltage at its pre-fault reference. However, a decrease in the impedance forces the inverter to export more current to maintain the pre-fault voltage. But, this excess current must be limited for the safety of the power electronic switches. Since the cause of this increased current is the voltage reference, one way to limit the currents is to decrease the voltage reference. The reference can be decreased by emulating a voltage drop across a virtual impedance. In this block, a virtual resistance has been modeled to increase the damping of the control system instead of the virtual impedance [1]. This is done by the control structure shown below.

In this figure, the magnitude of the inverter’s current is subtracted from Ith , which is a threshold current (e.g., 1 pu), and then multiplied by the virtual impedance gain, kVI . The output is then given to a hard limiter. The hard limiter outputs zero if the input is negative and passes the signal otherwise. This causes the virtual impedance current limiting to be activated only when the current magnitude exceeds the current threshold.

Final d-q axis references are calculated according to the followings:

Double Loop Control

This Inner Loop Control approach adopts both voltage and current feedback control loops. The Double-loop control architecture of the Inner Control Loop is shown below.

The figure shows that this control structure is composed of two cascaded loops, i.e., the outer voltage loop and the inner current loop. In this figure, , , , and  are the cross-decoupling terms for removing the coupling between the synchronous reference frame (SYRF) signals caused by the inductor and the capacitor of the inverter’s filter.  F is the feedforward coefficient for the inverter’s output current. Vd* and Vq*   are the SYRF components of the reference voltages for the inverter’s terminal voltages.

The current feedback loop adopts a current saturation technique to constrain the current flow; hence, this Inner control loop technique poses inherent protection against overcurrent during larger disturbances.  

Comparison between the Inner Control Loop Methods

For similar filter settings, the grid-forming inverter poses a larger small-signal stability boundary when using the single-loop structure as the inner loop. This difference can be attributed to the different values of the coupling reactance of the two control strategies. Since the single-loop control structure regulates the inner voltage of the inverter, the coupling reactance between the inverter and the grid is larger than the Double-loop structure, which regulates the voltage of the filter’s capacitor. However, one major drawback of the single-loop inner control is the lack of current controllability. This can result in overcurrent tripping of the inverter during short circuits [2]. In the Double-loop control structure, on the other hand, the inverter's output current can be directly limited due to the existence of the current references.

References

[1] Y. G. Y. Z. A. J.-F. X. X. a. T. C. G. Y. Li, "Impedance Circuit Model of Grid-Forming Inverter: Visualizing Control Algorithms as Circuit Elements," IEEE Transactions on Power Electronics, vol. 36, no. 3, pp. 3377-3395, March 2021.

[2] X. W. M. L. X. L. a. S. E. R. Rosso, "Grid-Forming Converters: Control Approaches, Grid-Synchronization, and Future Trends—A Review," IEEE Open Journal of Industry Applications, vol. 2, pp. 93-109, 2021.

Intellectual Property Disclaimer

Natural Resources Canada owns all intellectual property rights in the Smart Inverter Modelling Toolbox software and related products.

OPAL-RT TECHNOLOGIES, Inc. | 1751, rue Richardson, bureau 1060 | Montréal, Québec Canada H3K 1G6 | opal-rt.com | +1 514-935-2323
Follow OPAL-RT: LinkedIn | Facebook | YouTube | X/Twitter