OP5963 Fiber Optic Synchronization Transceiver Module

DESCRIPTION

The OP5963 RTSI-optical transceiver is designed to send synchronization pulses between OPAL-RT chassis FPGAs (simulators or I/O expansion boxes). The hardware synchronization signal, also named RTSI, is used to synchronize calculation steps and I/O interfaces. The signal is converted to 650nm optical signal at the output to reduce noise during transmission, and converted back to RTSI when entering the next chassis.

In a cluster of chassis, one chassis is assigned the role of Master of the synchronization in the RT-LAB model, and its FPGA is programmed to generate the synchronization signal. The OP5963 in the chassis designated as Master receives its pulse from the FPGA and sends the signal to the other chassis (with FPGA in Slave mode that expects to receive a synchronization signal). A Slave can then transmit its signal to another Slave if needed.

COMPATIBILITY

The OP5963 is standard in all OP5600 2.0 simulators, but can be installed in any OP5600 chassis with the following considerations regarding hardware and software :

• OP5600 with OP5142 (Spartan3):
  • Internal cable between synchronization board and FPGA must be replaced with 30 113-0842
  • FPGA bitstreams must be regenerated with RT-XSG 3.x or higher RT-XSG 2.3.x release (OP5142 is not supported in RT-XSG 3.0)
  • No RT-LAB update required
• OP5600 with ML605 (Virtex6)
  • Interface card between ML605 and I/O carrier board must be 126-0506 (ML605_2)
  • Internal cable between synchronization card and FPGA must be replaced with with cables 113- 0840 and 113-0841
  • FPGA bitstreams must be regenerated with RT-XSG 3.x or later (ML605 is not supported in RT-XSG 3.0)
  • No RT-LAB update required
• Systems using Spectracom Tsync PCIe timing card
  • The OP5963 is not compatible with the OP5964 external clock adapter (126-0424). A compatible board is currently under

Applications

Hard real-time synchronization of I/O signals in models distributed on a cluster of OPAL-RT simulators.

Interface

Fault LED                  

The Fault/Incompatible LED will be ON if the heartbeat signal is not sent by the FPGA. This allows detection of FPGA bitstream incompatibility (bitstream produced with an RT-XSG version not supporting the OP5963).

Status LEDs             

Pwr: Green when powered up.

M/S: Green indicates MASTER mode, Yellow indicates SLAVE mode

RX: When receiving the synchronization signal, the Rx LED will be green. TX: When transmitting the synchronization signal, the Tx LED will be green.

TX/RX                        

Fiber optic connector. Compatible with OP4500, OP5607, OP7000 and OP7020.

Synchronizes time steps between systems and includes high speed FPGA pulses. Tx and Rx provide synchronization information.