HIL2GO-410 - OPAL-RT Board Configuration

When using OPAL-RT I/O modules with the OPAL-RT Board I/O management system, an OPAL-RT Board I/O instance is added to the I/O Interface Configuration.
This instance manages the I/O signal configuration parameters, the programming, and initialization of the FPGA and the selection of the hardware synchronization mode of the board.
It displays the expected conditioning modules and their corresponding settings.

In this HIL2GO bundle, the I/O OPAL-RT Board parameters are as follows.

This information is provided for reference, mostly for advanced users. Most users will want to use it “as is.”

I/O OPAL-RT Board OP4810-IO parameters
Parameter	Value
Chassis Type	OP4810 (versal)
Board ID (Chassis ID)	0
Use external synchronization source	☐ (Unchecked)
Type of generated synchronization signal	Optical
Bitstream configuration location	Standard repositories
Bitstream configuration file	<File name to come>.opal
Show advanced configuration	☐ (Unchecked)
Automatic bitstream reprogramming	▣ (Checked)
Bitstream name	<File name to come>.pdi
Force	☐ (Unchecked)
Disable strict hardware mismatch validation	☐ (Unchecked)
Enable FPGA scope	☐ (Unchecked)
Chassis name	OP4810-IO
IP address	192.168.3.5
Enable virtual mode	☐ (Unchecked)

I/O signals used in the model will be active ONLY if the model is run in Hardware synchronized mode.

HIL2GO Bundles

HIL2GO-410 - OPAL-RT Board Configuration

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