Circuit Model Scenarios Example Configuration

Opening the Example

1. To avoid modifying the original example, make a local copy of the Example Directory shown above.

2. Open VeriStand and Browse to the copied directory, then continue browsing to the Project Path and select the VeriStand Project (.nivsprj) file.

3. Click Configure... to open the System Definition file.

4. See the following sections on this page to explore the parameters configured in the Configuration Tree of the System Definition file.

Open

Hardware Configuration

1. In the Configuration Tree, expand Controller >> Custom Devices and click the Power Electronics Add-On custom device to open its configuration page.

2. The Hardware Configuration selected in the Configuration dropdown depends on the FPGA card targeted by the project. Note that this example could be re-created using any Hardware Configuration containing an eHS solver.

Open

Circuit Model and Scenarios

The Circuit Model for this example is a voltage divider circuit with a pre-configured set of Scenarios. Each Scenario contains a different set of resistance values for the two resistors in the circuit, R1 and R2.

1. In the Configuration Tree, expand Power Electronics Add-On and click Circuit Model.

2. The Circuit Model File Path points to the currently loaded Circuit Model. Open the file in Simulink to observe the circuit.

3. (optional) Click Reload to trigger a model update in the System Definition.

4. Under Scenario Configuration, the Use Scenarios? parameter is enabled. A VeriStand channel called Scenario Index has been automatically added to the tree.

5. The Scenarios File Path points to the currently loaded Scenarios file. Open the file in a spreadsheet editor to observe the Scenarios and modify them, if desired. See How to Use the Scenarios Feature for more information.

6. (optional) Click the Refresh button to see additional model information, including the Maximum Number of Scenarios supported by the circuit model and the Number of Scenarios Used by the currently loaded Scenarios file.

Circuit Model File Path: <Circuit Model Scenarios>\Circuit Model\Voltage_Divider.slx

Scenarios File Path: <Circuit Model Scenarios>\Scenarios\Circuit_Model_Scenarios.xls

Sources

The Sources page maps signals to each source of the circuit model. In this example, a Sinewave Generator is used to control the input voltage of the voltage divider.

1. In the Configuration Tree, expand Circuit Model and click Sources. This page is populated with a list of sources from the circuit model.

2. The mappings are configured as shown below, with SWG00 mapped to Vsource.

Switches

The Switches page maps signals to each switch of the circuit model. Because the voltage divider circuit model contains no switches, the eHS solver has automatically generated a dummy switch that does not affect the behavior of the simulation.

1. In the Configuration Tree, expand Circuit Model and click Switches. This page is populated with a list of switches from the circuit model.

2. Any signal can be mapped to the dummy switch.

Sinewave Generators

The default parameters of the Sinewave Generator mapped to Vsource are configured at edit-time. Because the parameters are VeriStand channels, they can also be modified during the simulation.

1. In the Configuration Tree, expand Circuit Model >> Sinewave Generators

2. In this example, the default values of the Frequency Engines and of SWG 0 are configured as shown below.

Waveform Channels

Waveform Channels allow signals to be streamed from the FPGA at a rate faster than that of the CPU execution.

1. In the Configuration Tree, expand Circuit Model and click Waveforms.

2. The signals in the example are mapped to the Waveform channels as shown below. The data from these channels will be streamed at the Sample Rate (S/s) specified at the bottom of the page.