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PWM Generators Example Configuration

Expand each of the sections below to explore the parameters configured in the PWM Generators example. The information on this page can also be used to validate project settings or to re-create the example in a new VeriStand project.

Example Directory

<Public Documents>\National Instruments\<NI VeriStand 20xx>\Examples\OPAL-RT\Power Electronics Add-On\PWM Generators

Project Path

<PWM Generators>\Project\<NI PXIe-XXXX>\PWM Generators.nivsprj

Opening the Example

  1. To avoid modifying the original example, make a local copy of the Example Directory shown above.

  2. Open VeriStand and Browse to the copied directory, then continue browsing to the Project Path and select the VeriStand Project (.nivsprj) file.

  3. Click Configure... to open the system definition file.

  4. See the following sections on this page to explore the parameters configured in the configuration tree of the system definition file.

Hardware Configuration

  1. In the Configuration Tree, expand Controller >> Custom Devices and click the Power Electronics Add-On custom device to open its configuration page.

  2. The Hardware Configuration selected in the Configuration dropdown depends on the FPGA card targeted by the project. Note that this example could be re-created using any Hardware Configuration that contains a set of PWM Generators.

NI FPGA Card

Hardware Configuration

NI FPGA Card

Hardware Configuration

NI PXIe-7868R

eHSx64_Dual_PMSM_VDQ_IO_7868R

NI PXIe-7891

eHSx64_Quad_PMSM_VDQ_IO_7891

PWM Config.PNG

 

Circuit Model

The Circuit Model in this example is a collection of eight simple passthrough circuits, each containing one voltage Source, one voltage Measurement, and one PWM-controlled Switch. By monitoring the measured voltage of each circuit, we can observe the behavior of the mapped PWM Generator.

 

  1. In the Configuration Tree, expand Power Electronics Add-On and click Circuit Model.

  2. The Circuit Model File Path points to the currently loaded circuit model. Open the file in Simulink to observe the circuit.

  3. (optional) Click Reload to trigger a model update in the system definition.

  4. (optional) Click the Refresh button to see additional model information.

Circuit Model File Path: <PWM Generators>\Circuit Model\PassthroughCircuit.slx

Sources

The Sources page maps signals to each source of the circuit model. In this example, a constant value of 1V is mapped to each source using the VeriStand channels.

  1. In the Configuration Tree, expand Circuit Model and click Sources. This page is populated with a list of sources from the circuit model.

  2. The mappings are configured as shown below, with the CPU (VeriStand) option configured for each source.

  3. The Default Value of each source VeriStand channel is set to 1V.

Switches

The Switches page maps signals to each switch of the circuit model. In this example, four PWM Generators and their complementary signals are mapped to the eight switches.

  1. In the configuration tree, expand Circuit Model and click Switches. This page is populated with a list of switches from the circuit model.

  2. The mappings are configured as shown below.

 

PWM Generators

In this example, four of the FPGA-based PWM Generators are configured with varying parameters so that their effects on the resulting PWM signals can be observed.

  1. In the configuration tree, expand Circuit Model and click PWM Generators.

  2. The PWM Generators parameters for PWM 0, PWM 1, PWM 2, and PWM 3 are configured as shown below.

  3. If desired, modify these parameters while the simulation is undeployed to observe the effects on the generated PWM signals.

 

 

Waveform Channels

Waveform Channels allow signals to be streamed from the FPGA at a rate faster than that of the CPU execution.

  1. In the Configuration Tree, expand Circuit Model and click Waveforms.

  2. The signals in the example are mapped to the Waveform channels as shown below. The data from these channels will be streamed at the Sample Rate (S/s) specified at the bottom of the page.

 

 

 

 

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