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OpCtrl OP5142EX1




The OpCtrl OP5142EX1 block provides an interface to the Opal-RT OP5142 card via the PCIe bus. The OP5142 card holds a Xilinx Spartan3 FPGA chip and can control up to 256 I/O lines.

The OP5142 is reconfigurable. Bitstreams for this card are produced using the Opal-RT RT-XSG product, version 1.3 or higher. The OpCtrl OP5142EX1 block allows the user to specify which OP5142 bitstream is required by the model. Programming of the flash memory of the card is performed accordingly before model loading, using the flash_update utility.

The OpCtrl OP5142EX1 block controls the synchronization mode of the OP5142. The OP5142 synchronization unit is fully compatible with other Opal-RT hardware synchronized cards (OP5110, OP5130-XSG, etc.) and is supported by the OpConfigSync block for easy synchronization source specification in multi-cards models.

Data transfers to and from the card as well as data pre- and post- processing are not performed with the OpCtrl OP5142EX1 block, but via a block set of functionality blocks. Raw data transfers are performed using the OP5142EX1 DataIn Recv block (for data transfers from the card to the model) and OP5142EX1 DataOut Send block (for data transfers from the model to the card). Other functionality blocks include data pre- and post-processing and are used for exchanging data with OP5142 Analog I/Os and Digital I/Os blocks supported in RT-XSG.

The OpCtrl OP5142EX1 block is also used to set the simulation state on the Opal-RT OP5142 card. During the simulation, an RT-LAB model with the OP5142 card passes through 4 states: LOAD, PAUSE, EXECUTE and RESET. The OpCtrl OP5142EX1 block sends the current state to the OP5142 card through the PCIe bus. For more information, check the Model State Example

Only one OpCtrl OP5142EX1 block must be found in one model for each OP5142 card used in the model. In multi-subsystem models, use OpLnk OP5142EX1 blocks in other subsystems sharing the same OP5142 card.

Note: The OpCtrl OP5142EX1 block requires that the model be run in Hardware Synchronized and XHP mode.


Controller NameThis parameter enables the binding between this OpCtrl OP5142EX1 block and functionality blocks that must be associated to the same OP5142 card. This string must be unique among all OpCtrl blocks present in the same model.
Board IDThis parameter is the integer value represented by the board index dip-switch of the backplane adapter board to which the OP5142 is connected. The value is in the range of 0 to 31. If the OP5142 is not connected to an adapter board, the value is 0.
Bitstream FileNameThis is the name of the bitstream to be programmed on the OP5142 before the model is loaded. The bitstream must have been produced with RT-XSG and must be available in the model directory at load time.
Bitstream ConfigurationThis is the configuration of the bitstream to be programmed on the OP5142 before the model is loaded. This parameter allows the user to use the same bitstream for several purposes.
Synchronization modeThis popup allows the selection of the Master, Slave or Master with external clock mode of hardware synchronization. Master mode must be used when the OP5142 is selected as the synchronization source of the model. Slave mode can be used when the synchronization source of the model is another Opal-RT card such as OP5142, OP5110, OP5130-XSG, etc. Master with external clock mode must be used when the OpCtrl block acts as the synchronization source but receives the RTSI signal from another device.
Generate External ClockNot yet supported.
Decimation factorThis parameter is available only when the Slave mode of synchronization is selected. Not yet supported.
Sample Time (s)This parameter allows the user to specify the sample time for this block, in seconds. The default value is 0, which specifies a continuous sample time (note that the sample time is borrowed from the separated subsystem).
These synchronization rules must be respected in the model:
  • A controller block and its related functionality blocks must share the same sample time.
  • If an OpConfigSync block is used and does not specify the OP5142 card as the synchronization source, the sample time must be an integer multiple of the synchronization source sample time specified in the OpConfigSync block.
  • If an OpConfigSync block is used and specifies the OP5142 card as the synchronization source, its sample time must be the fastest rate in the model.


This block has no inputs.


This block has two outputs:

The Error outport returns the following error codes:

0No error.
-1Card not detected.
-2Timeout waiting for a synchronization signal. If the block is in Slave mode, verify that the RTSI synchronization signal is properly connected.
-3Overrun detected.
-10This value can be added to the above codes. It signals a hardware mismatch error.

The IDs outport returns the 8 hardware identification codes of the conditioning modules connected to the OP5142 via the backplane adaptor board.

Two identification codes are returned for each slot of the carrier backplane, one for section A and one for section B of the carrier. For example, if an analog carrier OP5220 is installed in slot 1 of the carrier backplane connected to the OP5142, and if one OP5330 module installed in slot A of this carrier and one OP5340 module installed in slot B, the first two hardware IDs are 195 (or 'C3', in hexadecimal notation) and 193 (or 'C1'). Other typical IDs are 235 ('EB') for section A, and 234 ('EA') for section B of an OP5251 digital I/O carrier. When no carrier is installed in one slot, both IDs are set to 255 ('FF').

The hardware mismatch error is set when the hardware installed in one slot does not match the hardware required by the OP5142-XSG bitstream for that slot.

Characteristics and Limitations

This block must be run in Hardware Synchronized mode.

Only XHP-mode is presently supported.

Please refer to the RT-XSG documentation for hardware setup.

Direct FeedthroughNo
Discrete sample timeNo
XHP supportYes
Work offlineNo

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