Description

The Digital In functionality of the OPAL-RT Board interface provides the simulation with the digital input acquisition data obtained from the digital input channels of the OP5353 modules installed in the simulator.
In the case of the OP4200 chassis, the OP5353 module is incorporated into the I/O cassette with ID OP4250-1.

The data values are transferred to the simulation through the DataOUT ports of the FPGA.

The data port numbers and the location of the digital input modules in the simulator are specified in the bitstream configuration file, which must be provided in the main section of the current board's configuration.

Once the driver has read the bitstream configuration file, the user can see the location of the digital input modules and can configure them.

The OPAL-RT Board driver can control all of the digital input modules of the simulator at the same time. Therefore, the maximum number of digital input channels is limited by the hardware configuration of the simulator in use.

Currently, the Digital In functionality supports the reception of pulse width measurement (PWM), event detector (or Time-Stamped Digital Input), static and encoder signals.

Usage

Once the bitstream configuration file has been parsed, the location of the digital input modules becomes visible to the user. In the interface, the channels of the modules are divided in groups of 8 consecutive channels. By clicking on each group of 8, the user has access to the configurable options of the group.

A group of 8 channels is either dedicated to receiving PWM signals, detecting events, receiving static signals or receiving encoder signals, but not a combination of the four.
Bitstreams generated with an RT-XSG version of 3.1.2 or later offer the possibility of using the selectable digital input-output feature (SDIO).
The SDIO feature gives the user the option to switch between the type of functionality (either static, event detector or PWM) for a group of channels. The Encoder In functionality is not included in the SDIO feature.
The user will know if the bitstream offers the feature as soon as its configuration is loaded in the main section of the current board's configuration page.
Verifying that a bitstream is SDIO-capable is done in the channel group configuration section. If the bitstream has the feature then a drop-down list will be present for choosing the functionality. If it does not, the functionality will be displayed as a non-editable field (i.e. grayed out).

Reception of digital data

If the physical modules are programmed (through the bitstream) to receive static digital inputs, the data reported in the model is directly related to the physical values: a high voltage translates to a logical "true", "on" or 1, whereas a low voltage represents logical "false", "off" or 0.
For more information on the configuration needed for the channel group and the signals when receiving static input, please consult the Static Digital In help page.

In contrast, when the physical modules are programmed to receive PWM digital inputs, the information reported in the model for each channel will be the received signal's frequency and duty cycle.
For more information on the configuration needed for the channel group and the signals when receiving pulse width measurements, please consult the PWM In help page.

When using the event detector functionality, the physical modules describe rising-edge and falling-edge transitions (or events) occurring on the digital input. Each transition is described by the ending state of the digital line (0 for a falling edge, and 1 for a rising edge), and the time, relative to the beginning of the calculation step, when the transition occurred.
For more information on the configuration needed for the channel group and the signals when using the event detector functionality, please consult the Event Detector help page.

Finally, when the physical modules receive encoder signals, the values reported in the model are the angular rate, the position of the wheel within the revolution, the direction of the movement and the reception status.
For more information on the configuration needed for the channel group and the signals when using the encoder in functionality, please consult the Encoder In help page. 

Characteristics and limitations

For the connector pin assignments, the user should refer to the carrier documentation.

The current version of the digital input functionality of the OPAL-RT Board driver has the following limitations:

• Limitations will be added as they are found