Converter Control System

The control system includes regulation, synchronization, protection, and tap changer subsystems. Figure 1 shows the high-level control block diagram and Figure 2 shows the detailed control architecture used in the models. The below sections give a detailed description of the various subsystems of Figure 2.

Figure 1

Figure 2

The Vd-Id characteristic of a rectifier-inverter system

Figure 3

The rectifier regulates the direct current to maintain it equal to the current reference. In abnormal cases (e.g. voltage drop in the AC power system) the α angle can reach its minimal value α_min and the rectifier will not be able to regulate the current. In such a case, it is said to operate in α_min mode.

The inverter regulates the direct voltage V_d measured at the DC line input to its reference. As an example, Figure 3 shows the inverter operating in voltage regulation mode. If the current drops below the current reference, the inverter goes in a current-compensated mode where the voltage is regulated with a slope determined by the voltage margin ΔV and the current margin ΔI. If the current falls lower than the ΔI, the inverter will operate in current regulation mode.

In the case that the DC current increases beyond a certain level, the extinction angle γ might reach the minimum threshold resulting in the inverter losing its regulating capability. It then operates in γ_min mode.

Alpha Angle Regulation and Limiting System

Figure 4 shows the functional block diagram. This block regulates the DC current or voltage by adjusting the firing angle α and limits the inverter extinction angle to a minimum value.  The regulation unit consists of two PI controllers with limiters. The delay angle α is established by the lowest value among the outputs of the two regulators.

For a rectifier, the reference current Idref takes on a normal value (e.g. <1.2 pu) while the voltage reference Vdref takes on a very high value (e.g. 2 p.u.). In this way, the regulation unit cannot regulate the voltage and will be forced to operate in current regulation mode. In the case of the inverter, the dc voltage is regulated by comparing the reference current with the actual current to determine the current margin ΔI that would be corrected by the PI controller.

Figure 4

PI Regulators

The PI regulator includes the following transfer function:

where

• Ki is the internal gain
• KiTp = Kp is the proportional gain
• G(a) is the linearization factor

Upper and lower limits are applied to the regular output (representing the delay angle) to ensure it remains within a safe range of operation.

Correction Factor for Proportional Gain of PI Regulators

Gain linearization enables the PI controller to respond at the same speed at different values of α. On the inverter side, the linearization is applied on the β=180°-α and G(β) looks the same as G(α). The gain linearization is done by multiplying the proportional gain by a factor G(α) depending on α as shown in Figure 5.

The linearization of the gain does not apply to the integral part of the PI regulator because this part of the response is slower. The regulator output goes through two limiting functions before being sent to the firing unit. These functions are α limiter and Δα limiter.

Figure 5

α Limits

For rectifier, α is limited between two adjustable values. The typical limits are:

Note: In the equidistant mode of synchronization, the α_min rec is not used.

For the inverter, the lower limit is an adjustable constant, while the upper limit varies dynamically.

Where:

• γmin is the adjustable minimum value of the extinction angle
• γcf is the adjustable reduction on α max inv when a commutation failure is detected in order to reduce the risk of successive commutation failures
• μ is the calculated overlap angle.

Δα Limits

The purpose of imposing limits on variation rate Δα is to reduce the risk of commutation failure particularly when the value of Δα is high and improve the stability of the control system in case of faults or other large disturbances.

Note:

• In the equiangular synchronization system, Da is the difference between the current reference and the previous firing reference.
• In an equidistant synchronization system, Δα is the difference between the reference “a” and the value of “a” reflecting the position of the oscillator phase.
• For both rectifier and inverter, Δα is within a value range where only the vertical coordinates are adjustable.
• The typical values for the ordinates (X-axis) are: [Da1, Da2, Da3, Da4] = [90°, 5°, -10° and -5°] (rectifier); [Da1, Da2, Da3] = [6°, 1°, -6°] (inverter).

Figure 6

Voltage-Dependent Current Order Limiter (VDCOL)

Figure 7 shows the operation of the voltage-dependent current order limiter. The objective of this limiter is to ensure good recovery of the DC power transit following faults on the AC side. The risk of commutation failure during recovery is also minimized. The limiter has two functions: a) Dynamic filtering of the DC voltage; b) reference calculation

Figure 7

Dynamic filtering of the voltage 

The DC voltage Vd goes through a first-order filter whose time constant T varies as below:

T=T_d=0 when Vd decreases

T=T_m=80ms when Vd increases

The current reference falls immediately when the voltage drops but increases more slowly when the voltage rises. This allows for quick but controlled recovery of the direct power transit.

The typical values of the following adjustable parameters are:

Idref_min = 0.3 p.u

Vdf_min = 0.18 p.u

Vd_f1pu = 0.6 p.u

Idref_mina= 0.1 p.u

Tap Changer

The converter transformers (rectifier and inverter) can be equipped with a tap changer to control the voltage output. The below section gives the details of the controller.

Figure 8

Demand to Change Taps

Figure 8 shows the tap change transformer control logic. The tap changer controller generates the Up or Down order sent to the tap changer of the converter transformer in order to maintain α or γ angle in the range set by

on the rectifier: 

on the inverter: 

If the angle is not within the range, an up or down request is generated to bring the angle back within the range. The size of the range must be selected to avoid hunting (i.e. oscillation of the angle between the  Up area and the Down area). Usually:

• Range=at least 1.5 x maximum variation of angle corresponding to a tap. The default range values (adjustable) are shown in the following table:

Firing and Synchronization System

The lag angle reference (a) is a firing system input and is generated by the regulation system.  The generic synchronization system used in a 6-pulse converter is of the “equiangular” type. It can be used with a 12-pulse converter for which the user also has the option of using an “equidistant” synchronization system.

Equiangular synchronization mode

The firing pulses are synchronized with the zero crossings of the switching voltages.

Equidistant synchronization mode

The firing pulses are synchronized with an oscillator whose frequency is 12 times that of the power grid. The oscillator phase is controlled by the regulation system (current, voltage, etc.) which lags or leads the firing, if necessary. The oscillator gain allows users to determine the speed at which the oscillator synchronizes itself with the zero crossings of the switching voltages with a gain of 1 means a full synchronization. As the gain increases, the oscillator synchronizes itself more slowly with the zero crossings (1000 is the maximum). Hence, the system is not greatly affected by transients and unbalances of the AC switching voltages. A gain of 32 (default value) is a good compromise between the synchronization speed and the immunity to the harmonics on the switching voltages. In a transient state or during AC faults, when the switching voltages are absent or severely distorted, the oscillator gain is automatically increased to cancel any zero-crossing synchronization. 

Note that a valve will be fired (pulse generated) only when the voltage at its terminals has reached a minimum threshold, adjustable by the user.

Band Pass Filter

The voltages used for synchronization are filtered by band-pass filters with an adjustable tuning frequency. The transfer function of one band-pass filter is:

At fo frequency, H(s) has a gain of 1 and phase zero, hence impacting only the harmonic components and not the fundamental frequency. The B parameter (proportional to the pass-band ) is used to control the sensitivity and the speed of the filter. A small bandwidth improves harmonic filtering and gives less distorted wave-form at the filter output, however at the expense of reduced speed. The period T of the block is updated 12 times per cycle and is limited within an adjustable interval defined by the Freq max and Freq min parameters.

Low AC Voltage Detection

If the voltage is lower than a specified threshold during a specified time interval, the low AC voltage detection function provides a low voltage flag. In the equiangular synchronization mode, this flag is on and the calculated period T is not updated. It is rather maintained at its past value in the prevision of an eventual AC fault. Also, DC fault detection is inhibited. A falling edge delay (from True to False) is applied to the flag to ensure that it remains present for a minimum period of time.

Valve Faults and DC Fault

It is possible to simulate a short circuit on any of the 12 valves as required for a specified time interval (see the form in Figure 11 - 16). A resistive grounded DC fault can also be simulated at the converter terminal. The time interval is referenced with respect to the start of the acquisition, or t = 0.