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Power Monitoring and Control

The main elements of the power architecture of the simulator can be schematically represented as follows:

The Base Module provides inputs and controls that participate in the power management of the simulator.

Simulator Power

The main input power to the simulator is a standard 120 / 220 VAC 60/50 Hz input.

The ground for all of the modules and the power ground used by the ECU are tied at a single point in the Base module.

The input power is monitored. When it deviates from the acceptable operating range, an error is generated and the chassis protects itself and the ECU. This action could include but is not limited to, dropping into an unconfigured state or shutting down until error circumstances have been corrected.

System signals

The Base Module holds two buttons on its front plate, which are linked to the motherboard power on/off and reset input pins. these signals are routed to output pins of the rear ELCO-56 connector: PWR_SW1, RST_SW_A2, RST_SW_A1, PWR_SW2.

For debug purposes, the Base Module also routes system diagnostic signals to the output pins RAIL_PWRGD, /RST :

  • RAIL_PWRGD is asserted when the Battery Input Voltage and Simulator ±12 Volt are within the acceptable range.  This signal is active low and used to reset each FPGA output to a safe initial condition.
  • SYSTEM_RST (/RST) is asserted when the Reset switch is pressed or the digital power supplies (5V and 3.3V) are not within the acceptable limit.  When asserted, this signal maintains the simulator in reset. The FPGA loading process starts upon de‑assertion of this signal

Battery Control

A main switch controlled from the Battery Control State button in the Base Module run-time panel enables or disables the routing of the ECU battery voltage to the internal and external rail lines. 

The voltage value of the battery line is also measured, and its value displayed on the Base Module run-time panel.

Rail Control

Four high impedance inputs (>100 kΩ) are available on the Base Module ELCO-56 connector. These four lines, labeled RAIL_EN_INP0-3, are used to control the state of the power rails.

The state of each of these signals is based on a 3.5 threshold voltage with hysteresis. When the input voltage is above the threshold voltage, it is considered high. When the input voltage is below the threshold voltage, it is considered low. The appropriate bias voltage is applied to the input, by the simulator, to prevent the accidental assertion of the power rail.

The active polarity of each of these inputs is set in the Base Module configuration panel. 

Each of these four Rail Enable signals is used to enable or disable a subset of the rail lines (ACC, RADIO, CRANK, IGN3, IGN2, IGN0, MP S1, MP S2). The Base Module configuration panel provides controls to map the rail lines to the Rail Enable pins.

The four Rail Enable pins are available on Rev2 Base Module cards only. Rev1 Base Module cards have only one Rail Enable pin RAIL_EN_INP0.

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