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OP4810-IO/OP4815-IO - Front Interface
Power and Reset Push Button with LED indicator:
Normal press: Power On or shut down the unit.
Long press: If the button is pressed for at least 4 seconds, the unit will shut down.
Integrated LED
Green: The unit is On
Black (unlit): The unit is Off
Small form-factor pluggable (SFP) module connectors: Provide high-speed communication links between other FPGA simulators or third-party devices.
Each socket controls one communication link.
CH00 through CH03 are reserved to expand an OPAL-RT’s simulator I/O capability using OPAL-RT’s Multi-System Expansion link (MuSE). NOTE: Feature available in Q1-2025.
CH04 through CH11 are compatible with the legacy generic Aurora link.
SFP transceivers and fiber-optic cables must be selected (and purchased separately) according to the type and speed of the communication protocol.
Note: MuSE link requires specific SFP transceivers and optical fiber cables:SFP: Avago AFBR-57R5APZ
Cable: LC-LC multimode 850 nm optical fiber
The LEDs associated with the selected channel will light to indicate the channel is selected.
LEDs are arrow-shaped to indicate the channels to which they are associated.
The LED upward arrow points to the top channel
The LED downward arrow points to the bottom channel (see below)
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Ethernet ports at 1 Gb/s
Only the lower Ethernet port identified “1” is supported. The upper port identified “0” is not used.
LED link status is described in the table below.
Status | Green LED Activity | Yellow LED Link State | |
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No link | Off | Off | |
Link up but no Activity | Solid On | Solid On | |
Link up with Activity | Blink | Solid On |
TX/RX Fiber-Optic Connectors (square connectors):
Synchronizes time steps between systems and includes high-speed FPGA pulses
Compatible with OPAL-RT XG series of real-time simulators: OP4610XG, OP5033XG, OP5705XG, and OP5707XG.
IRIG-B or 1PPS (future use)
USB port for JTAG programming
FPGA status LED indicators:
POWER: Unit is On and all internal power are correct
STATUS: FPGA status
Solid green: User bitstream FPGA is programmed
Blink green: Safe bitstream FPGA is programmed
Off: FPGA programming error
SYNC: Synchronization status
Solid green: RX and TX synchronization are OK
Blink green: RX and TX synchronization are OK, but timestep is very long
Off: No synchronization
USER: User-defined LED
Can be programmed to solid green, blinking green or off
LCD screen change page button
Press the button to display the next page
When the last page is displayed, it returns to the first page
LCD screen: Display information on different pages:
The screen displays 4 lines of 20 characters
Page | Information displayed | Example |
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Boot page |
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ID page |
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Network page |
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Status page |
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Software version |
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Changing the Chassis ID Number
Remove the front panel as explained in this page.
Set the dip switches SW2 in binary code on 8-bit to change the chassis ID number.
Range is between 0 and 255.
Switch down is 0 and switch up is 1
OPAL-RT TECHNOLOGIES, Inc. | 1751, rue Richardson, bureau 1060 | Montréal, Québec Canada H3K 1G6 | opal-rt.com | +1 514-935-2323
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