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HIL2GO-410 - I/O Slot 3, Section A and B (CH 00-05) - RS422 Digital Inputs/Outputs (OP5969)

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HIL2GO-410 - I/O Slot 3, Section A and B (CH 00-05) - RS422 Digital Inputs/Outputs (OP5969)

The bitstream provided with the bundle HIL2GO-410 is configured for incremental rotary encoders with signals A, B and Z in input and output.
These signals are generated (output) and read (input) through the four DB9 connectors.

Section A - RS422 Digital Inputs

image-20240815-155750.png

Before designing cables, OPAL-RT recommends using the guideline Simulator EMC cable recommendations.
Before connecting the cables, make sure that the voltages or other electrical specifications are compatible with OPAL-RT DB37 specifications of I/O module OP5969-1.

Connector P1
Slot 3 - Section A - RS422 DIN - CH00-02

DB9F pin (Channel)

Assignment

DB9F pin (Channel)

Assignment

1 (CH00)

+ENC0 IN A

6 (CH00)

+ENC0 IN A

2 (CH01)

+ENC0 IN B

7 (CH01)

+ENC0 IN B

3 (CH02)

+ENC0 IN Z

8 (CH02)

+ENC0 IN Z

4

Not used

9

Not used

5

Not used

 

 

image-20240621-215300.png
OP5969-1 RS-422 DIO slot 3, section A

Connector P2
Slot 3 -Section A - RS422 DIN - CH03-05

DB9F pin (Channel)

Assignment

DB9F pin (Channel)

Assignment

1 (CH03)

+ENC1 IN A

6 (CH03)

-ENC1 IN A

2 (CH04)

+ENC1 IN B

7 (CH04)

-ENC1 IN B

3 (CH05)

+ENC1 IN Z

8 (CH05)

-ENC1 IN Z

4

Not used

9

Not used

5

Not used

 

 

Encoder In Parameters

Encoder

Signal names

OpInputs Signals

Digital Type

Encoder In

0

Rate

QEIO.QEI / u1 

Number of encoder signals

2

Position of wheel

QEIO.QEI / u2 

Frequency unit

Hz

Direction

QEIO.QEI / u3 

Resolution (# of cycles per revolution)

1024

 

 

 

Clockwise rotation

Ch A leads Ch B

1

Rate

QEIO.QEI / u4 

Auxiliary output type

Angle

Position of wheel

QEIO.QEI / u5 

Angle unit

Degree

Direction

QEIO.QEI / u6 

Minimal rate

0.0016666667

0 & 1

Status

QEIO.QEI / u7 

Section B - RS422 Digital Outputs

Connector P1
Slot 3 - Section B - RS422 DOUT - CH00-02

DB9F pin (Channel)

Assignment

DB9F pin (Channel)

Assignment

1 (CH00)

+ENC0 OUT A

6 (CH00)

-ENC0 OUT A

2 (CH01)

+ENC0 OUT B

7 (CH01)

-ENC0 OUT B

3 (CH02)

+ENC0 OUT Z

8 (CH02)

-ENC0 OUT Z

4

Not used

9

Not used

5

Not used

 

 

Connector P2
Slot 3 -Section B - RS422 DOUT - CH03-05

DB9F pin (Channel)

Assignment

DB9F pin (Channel)

Assignment

1 (CH03)

+ENC1 OUT A

6 (CH03)

-ENC1 OUT A

2 (CH04)

+ENC1 OUT B

7 (CH04)

-ENC1 OUT B

3 (CH05)

+ENC1 OUT Z

8 (CH05)

-ENC1 OUT Z

4

Not used

9

 Not used

5

Not used

 

 

Encoder Out Parameters

Encoder

Signal names

OpOutputs Signals

Digital Type

Encoder Out

0

Input

QEIO.QEO / y1

Number of encoder signals

2

Frequency unit

Hz

Resolution (# of cycles per revolution)

1024

1

Input

QEIO.QEO / y2

Clockwise rotation

Ch A leads Ch B

Polarity

Active high

When using a machine model in the schematic editor, the encoder signals will be overridden by the encoder signal of the FPGA machine model.

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