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VSC Solid State Transformer
- Sylvain Ménard
- Juan Paez-Alvarez
Location
This example model can be found in the RTLAB under the category MMC example model with the file name "CPU_SST_acac.slx".
Description
This model simulates a three-phase solid state transformer. Each phase has 3 submodules connected with input series output parallel (ISOP) connection, shown as
To configure the model using VSC blocks, there are three steps, as follows
- the first step is to set the VSC Parameter Block. The model is composed by 27 full bridge submodules (FBSMs) and 3 half bridge submodules (HBSMs).
- The second step is to set the VSC Configuration Block, the total number of submodules (FBSMs and HBSMs) is 30. The number of internal capacitors is 10.
SM 1-18 are connected to the first 9 capacitors; SM 19-30 are connected to the 10th capacitor.
The total DAB number is 10, where SMs 1-9 and SMs 28-30 are not connected to the transformer, so the dab index is 0. SMs 10-27 are used in DAB converters, set DAB index 1 or -1 depends on the DAB current direction (positive for SMs on the side with current flowing into the transformer; negative for SMs on the side with current flowing out of transformer.)
- The third step is to set the physical connection to the rest circuit. The first 9 SMs are in node 1-3 (SM 1-3 in node 1, SM 4-6 in node 2, SM 7-9 in node 3), and the last 3 SMs are in node 4-6.
Simulation and Results
To illustrate the accuracy of the modeling method, the OPAL model (SWF) with 20 µs is compared with the SPS model with 1 µs. The comparison results are presented. The results validate that the OPAL model with 20 µs has matched performance as the SPS detail model with 1 µs. The System parameters are listed as
| Parameters | Description | Value |
|---|---|---|
| Pref_DAB | DAB power rating per module | 20 kW |
| Vmvdc | Medium voltage-side dc voltage per module | 4 kV |
| VLvdc | Low voltage-side dc voltage | 400 V |
| ftran | DAB transformer frequency | 2 kHz |
| Ls_DAB | DAB external inductance | 0.0420 H |
| Vac_MV | Medium voltage-side ac voltage | 8.5 kV |
| freq | Medium and low voltage-side grid frequency | 60 Hz |
| CC_mvdc | Medium voltage-side capacitance per module | 0.125 μF |
| Vac_LV | Low voltage-side ac voltage | 141.4 V |
| CC_lvdc | Low voltage-side capacitance | 11.3 mF |
Solid state transformer simulation results
Simulation performance
The elapse time for 1 s offline simulation.
| Test system | Execution time for SPS model (1us time step) | Execution time for OPAL model (20 us time step) | Acceleration factor |
|---|---|---|---|
| Solid state transformer | 583.78 s | 16.54 s | 35.29 |
The real-time simulation performance (the minimum time step). The minimum time step is the minimum time the real time simulator needs to solve the model. This value being larger than the model discretizing time step, usually 20 ~50 us, means that the model cannot run in real time.
| Test system | Minimum time step for SPS model | Minimum time step for OPAL model |
|---|---|---|
| Solid state transformer | 2907.6 us (> model discretizing time step) | 13.84 us (< model discretizing time step) |
References
[1] Zhang, F., & Li, W. (2019). An Equivalent Circuit Method for Modeling and Simulation of Dual Active Bridge Converter Based Marine Distribution System. 2019 IEEE Electric Ship Technologies Symposium, ESTS 2019, 382–387. https://doi.org/10.1109/ESTS.2019.8847728
See Also
VSC Switching Function Model with Variant Subsystems, MMC STATCOM on CPU
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