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Op8255 Digital Out




The generic Op 8255 Digital In and Op 8255 Digital Out blocks are designed to access the digital IO lines of cards featuring standard8255 Programmable Peripheral Interface (PPI) chips. The 8255 PPI features three 8-bit ports (commonly referred to as PA, PB and PC), programmable in three different modes.

The Op8255 Digital Out block monitors one port of one 8255 chip and sets up the 8 lines of this port as output lines.


8255 chip addressEnter the board address plus the offset of the 8255 chip relative to the base address of the card. (in hexadecimal format)
PortSelect one of the three available ports. 0 refers to PA, 1 to PB and 2 to PC.
Synchronizesee definition.


Three input vectors, Rst, Pause and Run, are used to specify the values to be sent to the channels during the Reset, Pause and Run phases of the model.

Each vector specifies the values to be sent to different channels. For example, the vector [0 0 1 1 1] will produce a 5 Volt output on the third, fourth and fifth channels of the port.

Note: It is not necessary to send a value to all channels.

These three input vectors must have the same width. If the width is less than 8, the unused line will be set to zero.


This block has no outputs.

Characteristics and Limitations

This block can be used with boards where the 8255 chip address is directly accessible and does not require remapping or additional initialization. In later cases, a specific block must be designed.

Direct FeedthroughNo
Discrete sample timeNo
XHP supportYes
Work offlineNo

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