Documentation Home Page RT-LAB Home Page
Pour la documentation en FRANÇAIS, utilisez l'outil de traduction de votre navigateur Chrome, Edge ou Safari. Voir un exemple.

OpNI6602 Event Generator




The OpNI6602 Event Generator block makes use of the counter/timers of the NI6602 card to generate a digital signal that can be toggled at a precise time during a calculation step.

The NI6602 card holds eight 32-bit counter/timers. The OpNI6602Event Generator block can monitor any number of these counters simultaneously, while each counter produces its own output signal. The input vectors specify the Event and Delta values for each counter monitored by the block.

The figure below shows an example of block inputs and the corresponding output signal waveform during four consecutive calculation steps.

In this drawing, the reference signal, X1, coming from the OpSyncNI6602 synchronization block, is connected to the GATE pin of the counters monitored by the block. This input clock signal is a pulse train, and its period is equal to the model calculation step, Ts.

At each time step, anEvent and Delta values pair is specified for each counter through the inports of the block.
The block can only produce one event per model calculation step. TheEvent input can only take one of the three values -1, 0, and 1.

A '-1' value means that the Y1 output signal during the next time step will hold its current value.

A '0' value means that the Y1 output signal will drop to its low level,

A '1' value means that the Y1 output signal will rise from low to high level during the next step.

The Delta value represents the time at which the transition on the outputs signal is to occur during the next calculation step. This value can be specified as a time ratio relative to the model calculation step Ts, or directly in seconds.

All possible Event and Delta values are summarized in the inputs section below.

The Y1 signal is produced at the counter output. The actual output pin numbers on the 68 pin connector are highlighted in the connector pin assignments section below.


Bus TypeThis popup menu enables the user to select the bus type of the target computer where the NI6602 card is installed. The options are PCI or PXI.
PCI indexEnter the PCI index (see definition)of the card on the PCI (or PXI) bus.
Counter ListEnter the vector of counter numbers that will be monitored by this block. The counters are numbered from 0 to 7 and can be entered in any order.
Clock SourceThis option is disabled - Because instability of the output signal was observed at 80MHz, Event Generator counters use 20MHz Clock Source only.
PolarityEnables the user to invert the polarity of the output signal. By selecting'Active Low', a 0-1 transition will actually make the signal drop from 1 to 0.
Delta unitSelect if the Delta input will be specified as a ratio of the time of the event over the duration of the step, or directly in seconds.
Use Opsync signal from RTSI busWhen this option is selected and when the Route synchronization signal to RTSI bus option of the OpSync NI6602 block also selected, the connection between the GATE input pins and the synchronization signal is done internally. Otherwise, the connection must be externally done through the 68pin IO connectors.
Synchronizesee definition.


The block is controlled using two inputs: the Event requested (rise or drop) and Delta, the time at which the event is to happen, as presented in the functional description section. An event requested during a given calculation step will happen only during the following calculation step.

The tables below summarize all possible values for the Event and Delta inputs.

Event: Type of transition to produce during the next calculation step.

Possibles Values Description 
-1Signal will remain constant during the calculation step (nothing will happen) 
1Signal will rise from 0 to 1 
0Signal will drop from 1 to 0 

Note: Requesting a signal rise while the signal is already up will not produce any transition at the output. The same applies if the signal is already down and drop is requested.

Delta: Time location of the transition relative to the beginning of the step. This value can be defined as a ratio of the time location of the event (dt) over the overall duration of the step (see figure above), or directly in seconds(which is the direct value of dt, see icon parameters).

Possible Values (ratio) Description 
0 <= x <= 1 Time at which an event is to occur over duration of a calculation step (step size) 
Possible Values (seconds) Description 
0 <= x <= step size Number of second between the beginning of the next step and the event


This block has no outputs.

Characteristics and Limitations

Connector Pin Assignments

The GATE pin of each counter monitored by the OpNI6602 Event Generator block must be connected to the reference signal output by the OpSync NI6602 block. All GATE pins are highlighted in the table below.

The OpSync NI6602 synchronization signal can come from a different NI6602 card than the one currently in use by the OpNI6602 Event Generator block.

Note: The GATE pins do not need to be actually connected to the synchronization signal if this signal is routed to the RTSI bus. If the OpSync NI6602 synchronization signal comes from a different NI6602 card than the one currently in use by the OpNI6602 Event Generator block, both cards must be connected together with an RTSI cable.

Reminder: When both the OpNI6602 Event Generator and OpSync NI6602 blocks use the same card, counters 0 and/or 1 are reserved for the OpSync NI6602 block and cannot be used by the OpNI6602Event Generator block.

NI6602 68-pin connector

Pin Description Number Pin Description Number 
SOURCE6 22Reserved56
Reserved 19OUT653
OUT7 16GND50
DIO7 15GND49
GND 14DIO648
DIO4 13DIO547
DIO3 12GND46
GND 11DIO245
DIO0 10DIO144
OUT1 9Reserved43
Reserved 4Reserved38
GATE0 3Reserved37
+5V 1Reserved25
Direct FeedthroughNo
Discrete sample timeNo
XHP supportYes
Work offlineNo

OPAL-RT TECHNOLOGIES, Inc. | 1751, rue Richardson, bureau 1060 | Montréal, Québec Canada H3K 1G6 | | +1 514-935-2323