Page Content

RT-LAB 2023.3.2

Software Toolboxes Installed with RT-LAB

I/O Interfaces

OPAL-RT Board

• Fixed greyed out directions in DIO for OP5369

• Fixed simulation not resetting due to incorrect chassis ID

FPGA-Based Simulation

• Added the support of x32 and x64 licence class for eHS Gen5

• Added the support of new eHS solver reset pin in the Schematic Editor Workflow

• Added the support of low latency solver strategy for eHS Gen5

RT-XSG

• Added the support of Xilinx Vivado 2022.2

• Added SPI slave blow allowing a different sizes of MISO and MOSI

• Added I2C Master and Slave blocks

• Fixed the bitbasher on the 2nd channel for Sine_in in the Resolver Input Subsection block

• Fixed unresolved links in OP5367 IO Block library

• Removal of Xilinx Vivado 2017.X

• Removal of Matlab R2016a/R2016b

• Removed support for OP4200

RT-LAB 2023.3.1

I/O Interfaces

OPAL-RT Board

• Fixed issue when enumerating multiple FPGAs

FPGAScope

• Fixed issue with FPGAScope on Redhat systems

RT-LAB 2023.3.0

Software Toolboxes Installed with RT-LAB

Added

• Dashboards: Added support for graph widgets

• Dashboards: Added dashboard rtdemo1 example model

• Added support for Windows 11

• Added Exata example model

• Added a notification in the model compilation log to inform the user that support for Matlab 2020A and 2020B will be removed from the upcoming RT-LAB 2024.1

Improved

• Improved the display of the warnings during model compilation by adding an environment variable SHOW_COMPILER_COMMANDS

• Improved the robustness of Data Definition Format (DDF) file generated by the FMUConfGenerator

• Prevented the user from using Model Exchange FMU

• Homogenized the Orchestra API documentation and fixed typos

• Improved performance for AMD CPUs on Opal-RT Linux 64 bits targets

Fixed

• Fixed issue where models were blocked when attempting to exchange data unidirectionally through Orchestra using the I/O interface

• Removed security in FMUConfGenerator preventing the generation of unidirectional orchestra communication

• Fixed issue related to RT-LAB version’s upgrade on target when loading several Orchestra models and framework

• Fixed issue causing the project to close every time parameters are loaded using snapshot

• Added functions not exported in the public Orchestra API: RTCheckReadyToGo(), RTGetSkipWaitToGoAtConnection(), RTSetSkipWaitToGoAtConnection(), RTUseFlagWithTool()

I/O Interfaces

CAN

• Added support for the next generation of Kvaser CAN PCIe card (01414)

• Fixed data not reaching maximum range as specified in the configuration

• Fixed problem with bus load monitoring

TCP/UDP

• Added support for VLAN (802.1q) management

• Added option to change message order for custom data frames

Pickering

• Fixed support for more than one PXI chassis

Artemis

• Improved offline simulation performance

• Upgraded Wideband and Marti-FD line/cable gen-2 models

• Removed obsolete models listed in https://opal-rt.atlassian.net/wiki/spaces/PArtemis/pages/140149553

• Removed obsolete blocks:

  • Asynchronous machine model with turn ratio (now standard in Simscapce SimPowerSystems)

  • Three-Phase Fault block was superseded by the opElectricFault block of ARTEMiS

  • Switched core transformers models (now superseed by SSN OLTC models)

  • Simple Switched-segment MOV (Now replaced by SSN iMOV model)

• Added blocks inhttps://opal-rt.atlassian.net/wiki/spaces/PArtemis/pages/368771615

  • https://opal-rt.atlassian.net/wiki/spaces/PArtemis/pages/369033765

• Added example model

  • Distance protection relay

  • 505167 directional overcurrent protection relays

  • 87T protection relay

Phasor-Domain Simulation

• Added excel migration tool from version 1.8 to 2.0

• Added news components imported from PowerFactory

  • ExciterAC7B

  • TurbineGovernorDEGOV

  • Bus Coupler (ElmCoup)

• Updated Static Generator (ElmGenstat) component imported from PowerFactory

• Fixed internalVang output pin being incorrectly named getInternalVang

RT-EVENTS

• Fixed issue with removal of RTE-Drive blocks

MMC

• Re-organized MMC blocks for better maintainability and easier use as described in 

• Combined the MMC HVDC examples (CPU+HVDC) using the new MMC Valves blocks

• Deleted obsolete DEMOS MMC4