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RT-LAB | Release Notes 2024.3
- 1 RT-LAB 2024.3.1
- 2 RT-LAB 2024.3.0
- 2.1 Added
- 2.2 Improved
- 2.3 Fixed
- 2.4 Removed
- 2.5 Signal Visualization and Processing
- 2.5.1 Dashboards
- 2.5.2 Scopeview
- 2.6 I/O Interfaces
- 2.6.1 AsyncSerial
- 2.6.2 CAN
- 2.6.3 EtherCAT master
- 2.6.4 FPGA drivers (common changes to OPAL-RT Board and OpCtrl S-Functions)
- 2.6.5 MODBUS master
- 2.6.6 MODBUS slave
- 2.6.7 OPAL-RT Board
- 2.6.8 S-Function IOs
- 2.6.9 TCP-UDP
- 2.7 ARTEMiS - CPU-Based Electrical Toolbox
- 2.8 ePHASORSIM - CPU-Based Phasor-Domain Toolbox
- 2.9 FPGA-Based Power Electronics Toolbox
- 2.9.1 eHS Blockset
- 2.9.2 RT-XSG Blockset
- 2.9.3 MMC
RT-LAB 2024.3.1
Software Toolboxes Installed with
Toolbox | Version Number |
---|---|
7.10 | |
2024.3 | |
2.18 | |
2.13 | |
4.7.8 | |
3.6 |
Fixed
Fixed isolation lost event issue
Fixed RT-LAB library blocks display with Matlab R2024a
Fixed intermittent load issue
Fixed issue when changing the IP address of a Opal-RT Linux target from the UI
Enhanced the target registration process to prevent permanent locking
FPGA-Based Power Electronics Toolbox
eHS Blockset
Fixed
Fixed FDLine minimum time-step with eHS Gen5
Fixed reversed digital gating signals to eHS
Fixed Analog Aout Clipping for all OP45XX bitstreams
RT-LAB 2024.3.0
Added
Added support for MATLAB/Simulink R2024a for RT-LAB and all toolboxes except RT-XSG which depends on Xilinx/AMD Vivado support of MATLAB, now at R2022a
Added information to the complete diagnostic tool (syspart execution, Hyperthreading status)
Added a check that validates the connectivity of required ports when launching RT-LAB
Improved
Improved target status update:
detection of correct state of the target
freeze issues when refreshing target status
Improved the target reboot process to avoid keeping RT-LAB waiting until the target is back
Fixed
Fixed model reset issue when the model uses OPAL-RT Board and S-Function IOs
Fixed synchronization state between the simulation and dashboards when executing and pausing the model
Fixed issue of targets disappearing from targets lists
Fixed import of corrupted workspace with nested projects
Fixed an issue where deleting and adding back the same target didn't set the development node correctly
Fixed an issue when opening RT-LAB a second time would kill the MetaController
Fixed an issue where the license couldn’t be installed if the current version of RT-LAB wasn’t previously installed
Removed
Starting/stopping recording of signals from Python script is no more available unless the RT-LAB GUI is closed
Disabled the option of canceling the uninstallation of RT-LAB when the operation started
Removed the automatic installation of RT-LAB on a target triggered when building a model
Signal Visualization and Processing
Dashboards
Added
Introduce a new widget: Text Display
Added a reporting tools to gather Dashboards logs located in C:\OPAL-RT\OpalOne\services\appserver\report.exe
Added an option in the Preferences modal to select diagram refresh rate
Added the option to comment out a widget
Added a popup dialog box that shows when an installation error happens, even when installing silently.
Improved
Improved and updated the Thermometers styling parameters.
Users can now change the Slider and Knob values by clicking on the display to enter a value.
The graduation ticks' font size is now editable in the Preferences modal.
Improved readability for rotated Slider and Thermometer widgets by keeping ticks non-rotatable.
Improved the Application Server logging system.
Improved block ordering and added automatic correction of incoherent ordering.
Improved the auto-save functionality.
Improved project import performance.
Improved script environment variables to allow Python API get current project name.
Fixed
Fixed error when closing popped out windows from the taskbar.
Fixed conflicts when opening multiple dashboard windows with RT-LAB and HS contexts.
Do not allow user to connect a graph widget to a datapoint while model is loading or resetting.
Fixed a bug where widget could be moved out of Tab group using keyboards.
Fixed the possibility of editing a Text widget while locked
Fixed the cursor when selecting many text widgets.
Fixed block ordering and added automatic corrected incoherent ordering.
Fixed an error when closing a popout from the taskbar.
Fixed an issue where deleting a connection in popout does not sync with main window
Fixed the issues of signals containing '.' character when generating UCM variables.
Fixed an issue of if a project is imported with existing path and no internal data zip, the existing project with the same path is not replaced.
Fixed an issue where workspace couldn't be initialize because SQL schema couldn't be found.
Fixed encoding issue in the RT-LAB API wrapper. Strings are received in Windows1552-encoded format and they need to be converted to UTF-8 to support non-ascii characters such as accented vowels.
Fixed an issue where Displayed widgets slowed when Graph Widgets where included in Tabs group.
Fixed issues where Dashboards could be blocked at resetting status.
Fixed an issue where Dashboards could not run Graph Widget connected on 2 different targets.
Scopeview
Signals from RT-LAB simulation cannot be visualized with Scopeview unless the GUI is closed
Deprecated RT-LAB Data source option in ScopeView
I/O Interfaces
AsyncSerial
Added support for the MOXA CP-116E-A and CP-118EL-A cards.
Added an example model for the MOXA CP-116E-A and CP-118EL-A cards.
CAN
Added a mechanism to enable and disable the transmission of cyclic messages during the execution of the simulation.
Fixed order of cards found when enumerating them in one chassis.
Fixed logging messages that were printed twice.
EtherCAT master
Added support for Beckhoff modules EL3154, EL4124 and EL1018.
FPGA drivers (common changes to OPAL-RT Board and OpCtrl S-Functions)
Added support for the standard I/O type H module OP48H20, for the OP4810-IO/OP4815-IO expansions chassis.
Improved stability of OP4810-IO/OP4815-IO programming.
Improved LCD messaging to include chassis name and version of programmed binary for OP4810-IO/OP4815-IO.
Improved configuration view for OP4810-IO/OP4815-IO.
Fixed loss of communication with FPGA after a OP4810-IO/OP4815-IO reboot.
Fixed crashes during bitstream programming.
MODBUS master
Added support for the MOXA CP-116E-A and CP-118EL-A cards in RTU mode.
MODBUS slave
Added support for the MOXA CP-116E-A and CP-118EL-A cards in RTU mode.
OPAL-RT Board
Fixed crash and overruns caused by splitting MuSE remote connections into different subsystems.
Fixed missing UI field that permits to control the phase shift of PWM output signals in real time.
S-Function IOs
Fixed Mezzanine Option Block issue of attaching to an OpLnk block.
Fixed use of advanced features (such as real time control of phase shift and dead time) with OpLnk.
Fixed inversed 'Dead time' and 'Phase shift' inputs for the PWM Out block.
Fixed model compilation errors when IO functionality blocks (such as DataIN or DataOUT) are present but commented out.
Fixed AnalogOut block’s mask that resets its voltage range to [-16 … 16] V at model opening.
TCP-UDP
Fixed configuration errors when multiple streams configured with the same NIC had explicited the same NIC speed.
ARTEMiS - CPU-Based Electrical Toolbox
Fixed build issue with model ThreeLevelInverter_TSB3level_HiZ
Renamed Smart Inverter Library Blocks
ePHASORSIM - CPU-Based Phasor-Domain Toolbox
Added
ePH Cosimulation FMI v2 implementation included in the ComponentEPhasorsim package
Improved
Decoupled Core Solver classes from Simulink
Updated Excel template to v2.0 for following examples
phasor07
phasor08
phasor12
phasor22
Fixed
Error in Matlab due to incorrect parsing of FACTS data when the “Use built-in” option is selected in the solver block with the phasor05 example model
Failure to calculate the Load Flow when a branch that includes buses is switched off
Phasor03_PSSE Model crashes when running real-time with a fault on line scenario
FPGA-Based Power Electronics Toolbox
eHS Blockset
Added
Added support of the new component CPU-FPGA Stubline
Added Custom Model XSG Block. Allows users to create custom XSG features and seamlessly connect to eHS
Added support OP4810 Versal chassis (Example in the Versal Dual Active Bridge example model)
Improved
Modified XSG Digital Input Mapping to specify input IO Slot https://opal-rt.atlassian.net/wiki/spaces/PFPET/pages/669647028
Improved the S-Function workflow, to load the configuration file before the start of simulation in RT-LAB
Fixed
Fixed encoder Number of Pulse Per Rotation saturating at 8191 instead of 16383
Fixed SFP outputs that where not working anymore with eHS
Fixed SFP unusual large latency
Fixed FPGA Scope not to prevent from Loading an eHS Circuit
Fixed Encoder signal not getting outputed for bi-directional Digital IO on all bitstreams
Fixed reversed digital gating signals to eHS.
Fixed incorrect behavior of half-bridge switch topology in eHS Gen5.
Increased maximum value for Variable RL and RC in the Schematic Editor
Fixed Copy Paste of NPC component in Schematic Editor workflow
Fixed Schematic Editor Single Phase 2/3 windings mutual inductance Resistances to support null values
Removed
Removed the Analog In Slot 2C information in the Versal IOConf since we can only have 16 AnalogIn channels connected with eHS
Removed support of x32 libraries following the end of support of x32 OS on Targets
RT-XSG Blockset
Added
Added support of the IO card OP48H20 "standard" (AIO/DIO/HCIG-OPALBOARD)
Added a workaround on bitstream generation fail due to the placement tool of AMD 2023.1 (illegal site placement; AMD Vivado 2024.1 will resolve it)
Added the chassis software version on the LCD of the OP481X
Fixed
Reinforced synchronization pulse for avoiding signal width reduction through several daisy chained simulators ("7-series", except for Artix-7, OP481X)
Fixed issue with OP481X MGT/SFP
MMC
Added
Added HVDC Bipole example to the library. It supports simulation on CPU or FPGA
Added a VSC example to demonstrate a more precise method to generate pulses for power converters by considering inter step events
Improved
Updated the HVDC MMC Point to Point. Now the user can select the type of simulation (CPU or FPGA) inside the model with a configuration block
Improved the selection of OpCntrl and OpLnk on the MMC Valves block and the MMC Valves Low Level Control block
Improved the performance of PWM and Deadtime blocks was improved.
Changed the VSC_param block: For VSC example models or custom models using this block, please ensure/crosscheck is rightly configured
Removed
Removed Matlab 2019b support
Removed Redhat 32 bits supported
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