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Digital Out

Description

The Digital Out functionality of the OPAL-RT Board driver provides the simulation the possibility of producing output signals through the digital output channels of the OP5354 or OP5360-2 modules installed in the simulator.

The data values are transferred from the simulation to the FPGA board through the DataIN ports of the FPGA.

The data port numbers and the location of the digital output modules in the simulator are specified in the bitstream configuration file, which must be provided in the General section of the configuration of the OPAL-RT Board driver.

Once the driver has read the bitstream configuration file, the user can see the location of the digital output modules and can configure them.

The OPAL-RT Board driver can control all of the digital output modules of the simulator at the same time. Therefore, the maximum number of digital output channels is limited by the hardware configuration of the simulator in use.

Currently, the Digital Out functionality supports the transmission of pulse width modulated (PWM), event generator, static and encoder signals.

Usage

Once the bitstream configuration file has been parsed, the location of the digital output modules becomes visible to the user. The channels of the modules are divided into groups of 8 consecutive channels. By clicking on each group of 8, the user has access to the configurable options of the group.

A group of 8 channels is either dedicated to producing PWM signals, generating events, setting static signals or generating encoder signals, but not a combination of the four.

Bitstreams generated with an RT-XSG version of 3.1.2 or later offer the possibility of using the selectable digital input-output feature (SDIO).

The SDIO feature gives the user the option to switch between the type of functionality (either static, PWM or event generator) for a group of channels.

The user will know if the bitstream offers the feature as soon as its configuration is loaded in the General section of the OPAL-RT Board configuration page.

Verifying that a bitstream is SDIO-capable is done in the channel group configuration section. If the feature is available then a drop-down list will be present. If it is not, the functionality will be displayed as a non-editable field (i.e. grayed out).

Transmission of Digital Data

If the physical modules are programmed (through the bitstream) to send static digital outputs, the value 0 (or logical "false" or "off") will be represented by a low voltage value on their outputs. Furthermore, the value 1 (or logical "true" or "on") will be represented by a high voltage value.

For more information on the configuration needed for the channel group and the signals when using static output, consult the Static Digital Out help page.

In contrast, when the physical modules are programmed to produce PWM outputs, the information to be sent from the simulation for each channel will be each signal's frequency and duty cycle.

For more information on the configuration needed for the channel group and the signals when producing pulse width modulated output, consult the PWM Out help page.

When using the event generator functionality, the physical modules generate rising-edge and falling-edge transitions (or events) occurring on the digital outputs. Each transition is described by the ending state of the digital line (0 for a falling edge, and 1 for a rising edge), and the time, relative to the beginning of the calculation step, when the transition is to occur.

For more information on the configuration needed for the channel group and the signals when using the event generator functionality, consult the Event Generator help page.

Finally, for the encoder out functionality, the angular rate provided in the simulation is used to produce the quadrature encoder signals (A, B and the index Z) which will then be outputted on the physical module's channels. The angular rate is measured either in revolutions-per-minute or Hertz.

For more information on the configuration needed for the channel group and the signals when using the encoder functionality, consult the Encoder Out  help page.

Characteristics and Limitations

For the connector pin assignments, the user should refer to the carrier documentation.

The current version of the digital output functionality of the OPAL-RT Board driver has the following limitations:

    • Limitations will be added as they are found

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