Smallest Time Step vs Lowest Latency - State Space Analysis Method

In eHS Gen 5 (State Space Analysis Method), switches introduced a delay in order to support interpolation. There can be one or two delays introduced depending on the solver strategy adopted. Furthermore, to mitigate this latency, a prediction is made on the measurements needed to compute the switches. Coupling of the switches model is done through voltage, and current injection, therefore depending on the stiffness of the circuit, a relaxation need to be applied to the injection to ensure model stability.

Smallest Time Step (Recommended)

This option ensures that the circuit will be solved using the smallest achievable time step. For resonating circuit, with high-switching frequency, it will detect current zero-crossing more accurately than with the lowest latency option. As a drawback, there will be two delays solving the switches. In addition, the time step will be bound between both a minimum and a maximum value, restricting the range of usable time step and potentially causing issues when combined with other components time step constraints (such as Machine Models). This can make particular circuit topologies unable to use the Smallest Time Step solver setting option. In that case, the circuit will generate User Notification #145 at circuit load.

If this happens, try using the Lowest Latency option.

Lowest Latency

This option ensures having only one delay introduced by the switches. It means that the state-space equations and the switches are solved subsequently. The time step will only have a lower bound but no upper bound. This relaxes the time step constraint and allows some problematic circuit topologies using other time step constraining components to be solvable.