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V2.18 Virtex-7 VC707 - eHS x128 - PMSM - IM - IO Config1

OPAL-RT TECHNOLOGIES
1751 Richardson suite 1060, Montréal QC Canada H3K 1G6
www.opal-rt.com

© 2023 OPAL-RT TECHNOLOGIES All rights reserved

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SPS WORKFLOW SCHEMATIC EDITOR WORKFLOWSCHEMATIC EDITOR WORKFLOW WITH SFUNCTION

Introduction

This firmware includes:

  • One eHS x128 Gen4 Solver
  • Two Dual Permanent Magnet Synchronous Machines (PMSM-VDQ) models
  • One Quad Generic Machines model
  • One Analog Output Mapping and Rescaling (AOMR) module
  • One Analog Input Differential Rescaling (AIR) module
  • One Thermal Losses (TL) module
  • One Saturable Transformer (satXFO) module


LoadIn/DataIn/DataOut mapping


LoadIn

DataIn

DataOut

1

Config eHS

Inputs eHS

eHS Averaged

2

Scenario / Rst eHS = Status

TSDO 1 - eHS 0 to 7

eHS DownSample

3


TSDO 2 - eHS 8 to 15

Digital In 2A - 0 to 7

4

PWM 2B -  0 to 7

TSDO 3 - eHS 16 to 23

Digital In 2A - 8 to 15

5

PWM 2B -  8 to 15

TSDO 4 - eHS 24 to 31

Digital In 2A - 16 to 23

6

PWM 2B -  16 to 23

TSDO 5 - eHS 32 to 39

Digital In 2A - 24 to 31

7

PWM 2B -  24 to 31

TSDO 6 - eHS 40 to 47

Digital In 4A - 0 to 7

8

PWM 4B -  0 to 7

TSDO 7 - eHS 48 to 55

Digital In 4A - 8 to 15

9

PWM 4B -  8 to 15

TSDO 8 - eHS 56 to 63

Digital In 4A - 16 to 23

10

PWM 4B -  16 to 23

TSDO 9 - eHS 64 to 71

Digital In 4A - 24 to 31

11

PWM 4B -  24 to 31

Digital Out 2B - SDO 0 to 7

Analog In 1B - 0 to 7

12

Config AOMR

Digital Out 2B - SDO 8 to 15

Analog In 1B - 8 to 15

13

eHS PWM 1 - eHS 0 to 7

Digital Out 2B - SDO 16 to 23

PMSM VDQ 1/2

14

eHS PWM 2 - eHS 8 to 15

Digital Out 2B - SDO 24 to 31

PMSM VDQ 3/4

15

eHS PWM 3 - eHS 16 to 23

Digital Out 4B - SDO 0 to 7

Quad Generic Machine

16

eHS PWM 4 - eHS 24 to 31

Digital Out 4B - SDO 8 to 15

Thermal Losses

17

Config AIR

Digital Out 4B - SDO 16 to 23

RMS and Power calculation

18

Config PMSM VDQ 1/2

Digital Out 4B - SDO 24 to 31


19

Config PMSM VDQ 3/4

AOMR/Analog Out 1A -  0 to 7


20

Config Quad Generic Machine

Analog Out 1A -  8 to 15


21

Config Thermal Losses

Analog Out 3B -  0 to 7


22


Analog Out 3B -  8 to 15


23

SFP

eHS PWM 1 -  0 to 7


24

Lookup Table Config

eHS PWM 2 -  8 to 15


25

RMS and Power calculation

eHS PWM 3 -  16 to 23


26


eHS PWM 4 -  24 to 31


27


eHS SWG


28


PMSM VDQ 1/2


29
PMSM VDQ 3/4

30


Quad Generic Machine


31
Analog Out 3A -  0 to 7
32
Analog Out 3A -  8 to 15
33
Thermal Losses
34
TSDO 10 - eHS 72 to 79
35
TSDO 11 - eHS 80 to 87
36
TSDO 12 - eHS 88 to 95
37
TSDO 13 - eHS 96 to 103
38
TSDO 14 - eHS 104 to 111
39
TSDO 15 - eHS 112 to 119
40
TSDO 16 - eHS 120 to 127
41
TSDO 17 - eHS 128 to 135
42
TSDO 18 - eHS 136 to 143
43
SFP
44
Lookup Table Config

System Overview




Extensive I/O compatibility (Polymorphism)

Listed cards are compatible at the same location (More details)




eHS solver

SPS WORKFLOW SPECIFIC

Connectivity

SPS WORKFLOW SPECIFIC

Source TypeSource IndexSource Name

Details

Input

0CPU Input
1eHS Analog InSlot 1B - Ch00-15
2PMSM VDQ 1/2

PMSM1 Ia/PMSM1 Ib

PMSM2 Ia/PMSM2 Ib
3Sine Wave Generator
4PMSM VDQ 3/4PMSM3 Ia/PMSM3 Ib
PMSM4 Ia/PMSM4 Ib
5

Quad Generic Machine

IM1 Stator Ia/IM1 Stator Ib/IM1 Rotor Ia/IM1 Rotor Ib

IM2 Stator Ia/IM2 Stator Ib/IM2 Rotor Ia/IM2 Rotor Ib
IM3 Stator Ia/IM3 Stator Ib/IM3 Rotor Ia/IM3 Rotor Ib
IM4 Stator Ia/IM4 Stator Ib/IM4 Rotor Ia/IM4 Rotor Ib
6Data Stream from SFP #00
Gate0CPU Gating Signal
1PWM
2Digital Input

Slot 2A - Ch00-31/Slot 4A - Ch00-31

SPS WORKFLOW SPECIFIC

To contextualize the Input and Gate Configuration table with this firmware configuration, the eHS firmware config tab must be configured with the following custom input source enumeration:

{'CPU Model',0,128;'Analog In',1,16;'Sine Wave Generator',3,32;'PMSM1',2,4;'PMSM2',4,4;'GM',5,16}

And this custom gate sources enumeration:

{'CPU Model',0,72;'Digital Inputs',2,64;'PWM',1,32}

Permanent Magnet Synchronous Machine models (PMSM VDQ)

A total of two PMSM motors are available and configured using the Permanent Magent Synchronous Machine. The machine type could be Constant DQ, Variable DQ or BLDC. 

SPS Workflow - PMSM (VDQ - BLDC) block


Schematic Editor Workflow - PMSM (VDQ - BLDC) block

Communication port configuration for the Dual PMSM (VDQ) block

      

Dual PMSM Motors VDQ 1

Machine Label

PMSM 1

PMSM 2

Data In Port Number

28

Load In Port Number

18

Data Out Port Number

13


      

Dual PMSM Motors VDQ 2

Machine Label

PMSM 3

PMSM 4

Data In Port Number

29

Load In Port Number

19

Data Out Port Number

14

Connectivity (Input)

The signals received could be used as external carrier for machine resolver module. 
Analog In - Slot 1B - Ch00-15

Encoder output

Encoder outputs are sent to 
Digital Out - Slot 2B


Encoder 1Encoder 2Encoder 3Encoder 4
ACh00Ch04Ch08Ch12
BCh01Ch05Ch09Ch13
ZCh02Ch06Ch10Ch14

Quad Generic Machine model (GM)

A total of four Induction Machines (IM) are available and configured using Generic Machine block in the eFPGAsim library.

SPS Workflow - Generic Machine block

Schematic Editor Workflow - Generic Machine block

Communication port configuration for the Quad Generic Machine (GM) block

      

Quad Generic Machine

Machine Label

IM 1

IM 2

IM 3IM 4

Data In Port Number

29

Load In Port Number

20

Data Out Port Number

14

Connectivity (Input)

The signals received could be used as external carrier for machine resolver module. 
Analog In - Slot 1B - Ch00-15

Encoder output

Encoder outputs are sent to 
Digital Out - Slot 2B


Encoder 1Encoder 2Encoder 3Encoder 4
ACh16Ch20Ch24Ch28
BCh17Ch21Ch25Ch29
ZCh18Ch22Ch26Ch30

Thermal Losses module (TL)

SPS WORKFLOW SPECIFIC

There is one Thermal Losses tab in the eHS CPU block allowing to configure all four thermal models.

SPS Workflow - Thermal Losses (TL) block

Communication port configuration for the Thermal Losses (TL) block


Thermal Losses
Data In Port Number33
Load In Port Number21
Data Out Port Number16

Power calculation module

SPS WORKFLOW SPECIFIC SCHEMATIC EDITOR WORKFLOW WITH SFUNCTION

RMS and power calculation for all circuit measurements is configured using the “Power Measurement Controller” block in the CPU model.

For more documentation on the block see : https://opal-rt.atlassian.net/wiki/spaces/PFPET/pages/65835684/CPU+Power+Measurement+Configuration+-+efs+Monitoring+cpuPowerBlock

Communication port configuration for the Power calculation block


RMS
Load In Port Number25
Data Out Port Number17

Analog Output Mapping and Rescaling module (AOMR)

AUTOMATIC AND NOT VISIBLE IN SCHEMATIC EDITOR WORKFLOW

There is one AOMR block allowing to configure all 32 analog outputs.

AOMR Master Subsystem (SM) block

Communication port configuration for the Analog Output Mapping and Rescaling (AOMR) block


AOMR - Slot 1A/3B

AOMR - Slot 3A

VersionV2
Data In Port Number1931
Load In Port Number1222

AOMR Output

Lane IndexSignal SourceDetails
0eHS OutputseHS Y01-128
1PMSM VDQ 1/2 AnalogOut
Dual PMSM VDQ Model
2PMSM VDQ 3/4 AnalogOut
3Quad Generic Machine AnalogOutQuad Generic Machine Model
4Data Stream from SFP #01

Analog Input Differential Rescaling module (AIR)

AUTOMATIC AND NOT VISIBLE IN SCHEMATIC EDITOR WORKFLOW

AIR block configures analog inputs for eHS.

AIR block

Communication port configuration for the Analog Input Differential Rescaling (AIR) block


AIR -Slot 1B

ChannelsCh00-15
Load In Port Number17

SFP Mapping and Communication Block

A total of 32 inputs and 32 outputs are available and configured using the SFP mapping and communication block.

Schematic Editor Workflow - SFP Mapping and Communication block


Communication port configuration for the SFP mapping and communication block


SFP - Channel 0

Data In Port Number43
Load In Port Number23

Analog In module (AI)

AI block reads signals from analog input channels on the simulator. 

SPS Workflow - AI block



Schematic Editor Workflow - OPAL-Board/DO

RT-LAB

HYPERSIM


Communication port configuration for the Analog Input (AI) block


Slot 1B 

ChannelsCh00-07Ch08-15
Data Out Port Number1112

Connector Pin Assignment

Please refer to your hardware documentation

Hardware Pin assignment


Analog Out module (AO)

AO block configures analog output channels on the simulator. 

SPS Workflow - AO block


Schematic Editor Workflow - OPAL-Board/DO

RT-LAB

HYPERSIM


Communication port configuration for the Analog Output (AO) block


Slot 1A 

Slot 3BSlot  3A
ChannelsCh00-07Ch08-15Ch00-07Ch08-15Ch00-07Ch08-15
Data In Port Number192021223132

Connector Pin Assignment

Please refer to your hardware documentation

Hardware Pin assignment


Digital In module (DI)

DI block reads signals from digital input channels on the simulator. It could be static, TSDI or PWMIn.

SPS Workflow - DI block

Schematic Editor Workflow - OPAL-Board/DO

RT-LAB

HYPERSIM


Communication port configuration for the Digital Input (DI) block


Slot 2A 

Slot 4A 
ChannelsCh00-07Ch08-15Ch16-23Ch24-31Ch00-07Ch08-15Ch16-23Ch24-31
Data Out Port Number345678910

Connector Pin Assignment

Please refer to your hardware documentation

Hardware Pin assignment


Digital Out module (DO)

DO block configures digital output channels on the simulator. It could be static, TSDO or PWMOut.

SPS Workflow - DO block

Schematic Editor Workflow - OPAL-Board/DO

RT-LAB

HYPERSIM


Communication port configuration for the Digital Output (DO) block


Slot 2B 

Slot 4B 
ChannelsCh00-07Ch08-15Ch16-23Ch24-31Ch00-07Ch08-15Ch16-23Ch24-31
Data In Port Number1112131415161718
Load In Port Number4567891011

Connector Pin Assignment

Please refer to your hardware documentation

Hardware Pin assignment

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