Description

This block sets some of the parameters to the MMCValves Block and MMC Valves Low Level Control Block.

One block can set up to 12 valves. Three different models are supported: CPU-based Average Model, CPU-based switching function model and FPGA-based switching function model.

This block is meant to be used on the Console subsystem. By doing so, the user is available of changing some of the parameters online, even when the simulation is running.

Mask and Parameters

Figure 1. MMC Valves Param block mask. On the left, the mask shows the parameters related to CPU model implementation. On the right, the mask shows the parameters related to the FPGA implementation.

The block can set the parameters for CPU and FPGA implementations of MMC Valves. For each case the parameters are grouped in different categories that are presented on different tabs. In the following, each of these parameters and categories are presented.

General Parameters

Name

Description

Unit

Admissible Values

Model Type

Selects the type of implementation (inside CPU or FPGA). This parameter cannot be changed online and must be set according to the MMCValves Block and MMC Valves Low Level Control Block in the model. If the model type does not match in the three blocks, the user will get messages of error saying that some signals are not found.
Since the type of Model cannot be changed on the MMCValves Block and MMC Valves Low Level Control Block once the model has been compiled it means that each time this parameter needs to be changed the whole model must be recompiled.

N/A

{CPU, FPGA}

Number of Valves

Number of valves in the corresponding MMCValves Block.

N/A

integers {1,2,3,.... , 12}

CPU Model Parameters

This section shows the block parameters that are available when the CPU implementation is selected. They are grouped in Model, Operation and Control tabs.

Model Tab

Figure 2. MMC Valves Param block mask for the CPU implementation. Highlighting the Model Tab. On the left when the block is configured for AVM, and on the right when it is for SFM.

Name	Description	Unit	Admissible Values
CPU Model Type	Selects the type of model to be used in the CPU: Average Model (AVM) or Switching Function Model (SFM). NB: This parameter must match the value set on the corresponding MMC Valves block and thus it cannot be changed online. The change of this parameter requires to recompile the model.	N/A	{AVM, SFM}
SM capacitance [Farads]	Sets the capacitance for each of the SM capacitors in the valves. In CPU mode, the same value is applied to all the SMs in the MMC Valves block.	Farads	>=0
SM discharge resistance [Ohms]	Each of the SMs has a parallel resistance to the capacitor. This parameter sets its value.	Ohms	>=0
SM Type	This parameter is available if CPU Model Type parameter has been set to SFM. It sets the type of sub-modules in the valves. The available options are Half Bridge, Full Bridge, Clamp double and T-type. All the SMs inside the corresponding MMC Valves block are set with the same type of SM. The implementation of different type of SMs in the same valve is supported in the FPGA models (see the corresponding FPGA parameters).	N/A	{Half Bridge SM, Full Bridge SM, Clamp double SM, T-type SM}
Number of SMs per Valve	This parameter is available if CPU Model Type parameter has been set to SFM. It sets the number of SMs per valve. In the current version the maximum number of SMs in the CPU-SFM type model is 50, more can be set by request. NB: This parameter must match the number of SM capacitors set in the corresponding MMC Valves block parameter mask according to the type of SM.	N/A	>=0 and <=50
Number of SMs per Valve HB-SM	This parameter is available if CPU Model Type parameter has been set to AVM. It sets the number of Half-Bridge SMs per valve.	N/A	>=0
Number of SMs per Valve FB-SM	This parameter is available if CPU Model Type parameter has been set to AVM. It sets the number of Full-Bridge SMs per valve.	N/A	>=0
Number of SMs per Valve CD-SM	This parameter is available if CPU Model Type parameter has been set to AVM. It sets the number of Clamp Double SMs per valve.	N/A	>=0

Operation Tab

Figure 3. MMC Valves Param block mask for the CPU implementation. Highlighting the Operation Tab.

Name	Description	Unit	Admissible Values
Enable Pulses	This parameter enables the pulses on the corresponding MMC Valves Low Level control block. When the parameter is unchecked, the Low Level Control sets all IGBTs in all the SMs to remain in the OFF state.	N/A	{Checked, Unchecked}
Vcap mode	This parameter sets different modes for the behavior on the SM capacitors. The first option is used for normal operation while the rest of options can be used for debugging. 0: Normal operation → when this option is selected, the SM capacitors behave normally. It means they are charged or discharged according to the direction of current and control signals 1: Vcap reset to 0 → this option forces the SM capacitors to 0 volts bypassing the control orders and not taking into account the valve current. The voltage is kept at 0 during all the time this option is selected. 2: Vcap use average value → this option forces the SM capacitor voltages to follow the average value of all the SMs in the valve, i.e. ΣVc / Nsm where Nsm is the number of SMs on each valve 3: Vcap reset to fix value → this option forces the SM capacitors to a fixed value bypassing the control orders and not taking into account the current. The voltage is kept at this value during all the time this option is selected.	N/A	{0: normal operation, 1: Vcap reset to 0, 2: Vcap use average value, 3: Vcap reset to fix value}
Vcap fix value [Volts]	This parameter is available only if the option on Vcap mode is selected to "3: Vcap reset to fix value". It sets the capacitor fixed voltage value.	Volts	>0
CD-SM Options : G5 ON/OFF	This option controls the behavior of the switch S5 in the case of Clamped Double SM. It enables the gating signal to control this switch or fixes it as always OFF.	N/A	{Checked, Unchecked}
Behavior after SM fault : Keep Cell short-circuit upon error	If checked, then if a short circuit occurs in a SM, the capacitor is considered to be damaged and its voltage is kept at 0.	N/A	{Checked, Unchecked}

Control Tab

This tab is only available if the CPU Model Type is selected as SFM

Figure 4. MMC Valves Param block mask for the CPU implementation. Highlighting the Control Tab.

Name	Description	Unit	Admissible Values
Modulation PWM or NLC	This parameter allows to select the type of Low Level Control to be used in the corresponding MMC Valves Low Level Control Block. When checked, the Pulse-Width-Modulation (PWM) modulation is used, when unchecked the Nearest-Level-Control (NLC) is used.	N/A	{Checked, Unchecked}
VBC mode	This parameter allows to select the type of balancing algorithm to be used in the corresponding MMC Valves Low Level Control Block. The user can select between two options: mode 1: switching the cell of maximum/minimum Vc mode 2: using sorting method	N/A	{mode 1: switching the cell of maximum/minimum Vc, mode 2: using sorting method}
VBC error (only for mode 1)	This parameter is only available if VBC mode is chosen as maximum/minimum method. It sets the maximum deviation allowed for the SM capacitor voltages.	p.u.	>0
IGBT dead-time (p.u. of Ts, [0,1))	This parameter sets the dead-time in the corresponding MMC Valves Low Level Control Block to generate the gating signals of complementary switches on each SM. The value is set as a percentage of the time step.	p.u.	[0,1)

FPGA Model Parameters

This section shows the block parameters that are available when the FPGA implementation is selected. They are grouped in Model, Operation, Control, Protection, Scope, Fault, CR discrepancy and Advanced tabs.

Model Tab

Figure 5. MMC Valves Param block mask for the FPGA implementation. Highlighting the Model Tab.

Name		Description	Unit	Admissible Values
SM capacitance [Farads]		Sets the nominal capacitance for each of the SM capacitors in the valves. The same value is applied to all the SMs in the corresponding MMC Valves block. However, the SMs can have variations around this value if discrepancies are used. See CR discrepancy tab.	[Farads]	>0
SM normal and fast discharge resistance [Ohms]		Each of the SMs has two parallel resistances to the capacitor. One for normal discharge and one for fast discharge. The fast discharge resistance is not always in use. It can be activated with the option Fast discharge in the Operation tab. The resistance values are set in a vector with two elements. The first element gives the resistance value for the normal discharge and the second one, the resistance value for the fast discharge. The same value is applied to all the SMs in the corresponding MMC Valves block. However, the SMs can have variations around this value if discrepancies are used. See CR discrepancy tab.	[Ohms]	>0
Switch Ron [Ohms]		Equivalent ON-state resistance for each semiconductor switch on each SM.	[Ohms]	>0
SM Capacitor voltage base [Volts]		Sets the SM capacitor base voltage	[Volts]	>0
Gating signal dead-time [μs]		Sets the dead-time in the Low Level Control implemented in the FPGA to generate the gating signals of complementary switches on each SM. The value is set in microseconds.	[μs]	[0,50]
SM groups	SM Type	Each of the valves can have up to three different type of SMs. They are organized by groups. This parameter sets the type of SMs of the corresponding group. In the actual version, the SM type can be chosen between the following: Half Bridge SM, Full Bridge SM, Clamped-double SM and T-type SM.	N/A	{0: Half Bridge (HB-SM), 1; Full Bridge (FB-SM), 2: Clamped-Double (CD-SM), 3: T-type (T-SM)}
SM groups	Number of SMs	Each one of the valves can have up to three different type of SMs. They are organized by groups. This parameter sets the number of SMs inside the group.	N/A	Depending on FPGA license

Operation Tab

Figure 5. MMC Valves Param block mask for the FPGA implementation. Highlighting the Operation Tab.

Name		Description	Unit	Admissible Values
Enable pulses		When checked, this parameter enables the gating pulses	N/A	{Checked, Unchecked}
Fast discharge		When checked, this parameter enables the fast discharge resistor on the SMs.	N/A	{Checked, Unchecked}
MMC gating signal routing		This parameter determines if the SM gating signal comes from the Low Level Control implemented in the same FPGA or from external IO (SFP).	N/A	{0: internal, 1: external from SFP}
For MMC, measurement message interval [μs]		Interval in μs of the measurements (e.g. capacitor voltages, valve current , etc) packets being sent out from the SM model to the internal or external controller.	[μs]	[0,10]
Capacitor debugging	Vcap mode	This parameter sets different modes for the behavior of the SM capacitors. The first option is used for normal operation while the rest of options can be used for debugging. 0: Normal operation → when this option is selected, the SM capacitors behave normally. It means they are charged or discharged according to the direction of current and control signals 1: Vcap reset to 0 → this option forces the SM capacitors to 0 volts bypassing the control orders and not taking into account the valve current. The voltage is kept at 0 during all the time this option is selected. 2: Vcap use average value → this option forces the SM capacitor voltages to follow the average value of all the SMs in the valve, i.e. ΣVc / Nsm where Nsm is the number of SMs on each valve 3: Vcap reset to fix value → this option forces the SM capacitors to a fixed value bypassing the control orders and not taking into account the valve current. The voltage is kept at this value during all the time this option is selected.	[μs]	{0: normal operation, 1: Vcap reset to 0, 2: Vcap use average value, 3: Vcap reset to fix value}
	Vcap fix value [p.u.]	This parameter is available only if the option on Vcap mode is selected to "3: Vcap reset to fix value". It sets the capacitor fixed voltage value in per unit.	[p.u.]	[0,4]
	Force cap charge current to zero	When this option is checked, the current on the capacitors is forced to zero. This prevents the SM capacitors to be discharged or charged, no matter what is the control signal.	N/A	{Checked, Unchecked}
CD-SM options	g5	This option controls the behavior of the switch S5 in the case of Clamped Double SM. Three options are available: 0: disable 1: enable 2: by protection signal	N/A	{0: disable, 1: enable, 2: by protection signal}
FB-SM options	force bit for FB-SM	This option allows to force the switches S3 and S4 to be in OFF and ON states respectively. In that way the FB-SMs behave as HB-SMs	N/A	{Checked, Unchecked}

Control Tab

Figure 6. MMC Valves Param block mask for the FPGA implementation. Highlighting the Control Tab.

Name	Description	Unit	Admissible Values
Enable protocol port	This parameter enables or disables the send of control and measurement signals insider the FPGA through protocol.	N/A	{Checked, Unchecked}
Gating signal from	It sets the source of the gating signal at the output of the controller inside the FPGA, either generated in CPU and send to the FPGA or generated by the low level control algorithm implemented in the FPGA.	N/A	{0: gate signal from CPU, 1: embedded VBC in FPGA}
Show external SM gate set port	This parameter activates or deactivates an external port to the block where the user can set the SM gating signals directly from the console.	N/A	{Checked, Unchecked}
CPU gating signal mode	Determines which gating signals for the SMs are sent from the CPU. In Related mode (checked) only the gating signals for switch S1 in the case of HB-SMs are sent. In the case of FB-SMs, CD-SM and T-type SMs, only the signals for switches S1 and S3 are sent. The rest of the signals are computed following the next logic: HB-SM → S2 is the complementary of S1, i.e. g2=NOT(g1); FB-SM and CD-SM → S2 is the complementary of S1, and S3 is the complementary of S4, i.e. g2=NOT(g1) and g3=NOT(g4); T-type SM → g2=NOR(g1,g3), g4=g3 In full mode (unchecked), all the gating signals are sent.	N/A	{Checked, Unchecked}
In controller, measurement from	It determines the source for the measurements received in the embedded controller in the FPGA, either from protocol (checked), or directly from the SM computation (unchecked).	N/A	{Checked, Unchecked}
Carrier frequency [Hz]	Sets the carrier frequency of the PWM signal to generate the gating signals in the embedded controller in the FPGA.	[Hz]	(0,3000]
Command packet interval by controller [μs]	Sets the interval in μs of controller command (e.g. gating signals etc.) packets being sent by embedded controller to the SMs.	[μs]	[0,10]
Inverse current direction at protocol	In measurement packet, positive current direction is defined as charging SM capacitor if this option is not checked. Otherwise, positive current discharge SM capacitor.	N/A	{Checked, Unchecked}

Protection Tab

Figure 7. MMC Valves Param block mask for the FPGA implementation. Highlighting the Protection Tab.

Name		Description	Unit	Admissible Values
Overvoltage Protection	Level 1 enabled	If checked, enables the first overvoltage detection for the SM capacitor voltages	N/A	{Checked, Unchecked}
	Threshold Level 1	This parameter is only available if the Level 1 is enabled. Sets the threshold for the overvoltage detection of Level 1. If the capacitor voltage exceeds this value the overvoltage signal becomes true.	[p.u.]	[0,4]
	Level 1 latch	This parameter is only available if the Level 1 is enabled. When checked, it allows the overvoltage signal of Level 1 to be latched. It means that once the overvoltage is detected the overvoltage signal continues giving true even if the voltage goes below the threshold value.	N/A	{Checked, Unchecked}
	Level 2 enabled	If checked, enables the second overvoltage detection for the SM capacitors	N/A	{Checked, Unchecked}
	Threshold Level 2	This parameter is only available if the Level 2 is enabled. Sets the threshold for the overvoltage detection of Level 2. If the capacitor voltage exceeds this value the overvoltage signal becomes true.	[p.u.]	[0,4]
	Level 2 latch	This parameter is only available if the Level 2 is enabled. When checked, it allows the overvoltage signal of Level 2 to be latched. It means that once the overvoltage is detected the overvoltage signal continues giving true even if the voltage goes below the threshold value.	N/A	{Checked, Unchecked}
Undervoltage protection	Protection enabled	If checked, enables the undervoltage detection for the SM capacitor votlages	N/A	{Checked, Unchecked}
	Threshold	This parameter is only available if the undervoltage protection is enabled. Sets the threshold for the undervoltage detection. If the capacitor voltage goes below this value the undervoltage signal becomes true.	[p.u.]	[0,4]
	Latch	This parameter is only available if the undervoltage protection is enabled. When checked, it allows the undervoltage signal to be latched. It means that the once the undervoltage is detected the undervoltage signal continues giving true even if the voltage recovers from the threshold value.	N/A	{Checked, Unchecked}

Scope Tab

The parameters in this tab configure the data to be scoped from the FPGA to the CPU. This data is available on the output port of the MMC Valves Low Level Control Block.

Figure 8. MMC Valves Param block mask for the FPGA implementation. Highlighting the Scope Tab.

Name	Description	Unit	Admissible Values
Receiving packet interval [μs]	This option sets if the measurement of the time interval between two packets being sent and received from the SMs and the controller is instantaneous or the maximum value. When instantaneous option is selected (parameter is checked) at each time step of the CPU the data monitored is the last one measured on the FPGA. In the case of maximum value (parameter unchecked), the maximum value measured on the FPGA is latched and send to the CPU, thus in the scoped data on the CPU the signal changes only if a new maximum time in the FPGA has been measured. The unit is µs, with resolution of 0.16 µs and a maximum range of 163.7 µs.	N/A	{Checked, Unchecked}
Vcap measuring point	This option sets if the measurement of the SM capacitor voltages that is sent to the CPU to be monitored is taken on the SMs directly or on the embedded controller in the FPGA. When the option is checked the measurement is taken at the SMs, when it is unchecked the measurement is taken from the value at the controller side.	N/A	{Checked, Unchecked}
Number of SMs to display	This option sets number of SMs to be monitored. If the value is N, the capacitor voltage of 2N SMs on each one of the valves is send from the FPGA to the CPU and optionally 2N SM states (if the Display individual SM state option is selected)	N/A	[0,50]
SM offset	This option sets which SM in a valve is the 1st SM being displayed. For an input x, the first SM to be displayed is 2x. For example if Number of SMs to display=5 and SM offset*=2 the SMs to be displayed are SM4 to SM14.	N/A	[0,Number of SMs in the valve]
Display individual SM state	If checked, this option enables SM states being sent from FPGA to CPU for monitoring	N/A	{Checked, Unchecked}
...on Valve	This parameter sets the valve from where SM states are sent to the CPU for monitoring. The options are from Valve0 to Valve5 if the Number of Valves parameter is less than six. Valves6 to Valve11 are available if the Number of Valves is greater than six.	N/A	{0: Valve 0, 1: Valve 1, ..., 10: Valve 3, 11: Valve 11}
Valve info showing:	This parameter sets the valve data to be monitored. The options are: Vcap max min values → if selected, the minimum and maximum SM capacitor voltages are monitored for each valve Total SM number that →with this option, the number of SMs that accomplish certain condition are scoped. the possible options are set in the Total SM number that parameter. Valve state and... → this option allows to monitor the valve state and also the total number of SMs that accomplish the condition described in the Total SM number with parameter. Reserved → this option is reserved for developers	N/A	{0: Vcap max min values , 1: Total SM number that, 2: Valve state and... , 3: reserved}
Instant / MaxMin value of...	This parameter is only available if the Valve info showing parameter is set as "Total SM number that". It sets if the values being sent to the CPU are the instantnous value sbeing mesured (option checked) or if they are the maximum and minimum detected values (option unchecked). In the case of MaxMin option, the value seen in the CPU does not change unless a nex maximum/minimum is detected.	N/A	{Checked, Unchecked}
Total SM number that	This parameter is only available if the Valve info showing parameter is set as "Total SM number that". It sets the condition of the SMs to show the total number that accomplish it. The possible options are: g1 is ON g2 is ON g3 is ON g4 is ON	N/A	{0: g1 is ON, 1: g2 is ON, 2: g3 is ON, 3: g4 is ON}
Total SM number with	This parameter is only available if the Valve info showing parameter is set as "Valve state and...". It sets the condition of the SMs to show the total number that accomplish it. The possible options are: 0: g1 open circuit fault 1: g1 short circuit fault 2: g2 open circuit fault 3: g2 short circuit fault 4: g3 open circuit fault 5: g3 short circuit fault 6: g4 open circuit fault 7: g4 short circuit fault 8: bypass breaker being closed 9: SM deactivated 10: Vcap overvoltage level_1 11: Vcap overvoltage level_1 12: Vcap undervoltage 13: capacitor short circuit fault 14: reserved 15: reserved 16: any of above-mentioned conditions	N/A	{0: g1 open circuit fault, 1: g1 short circuit fault, 2: g2 open circuit fault, 3: g2 short circuit fault, 4: g3 open circuit fault, 5: g3 short circuit fault, 6: g4 open circuit fault, 7: g4 short circuit fault, 8: bypass breaker being closed, 9: SM deactivated, 10: Vcap overvoltage level_1, 11: Vcap overvoltage level_1, 12: Vcap undervoltage, 13: capacitor short circuit fault, 14: reserved, 15: reserved, 16: any of above-mentioned conditions}

Fault Tab

This tab sets the parameters to assign faults on the valve SMs.

Figure 9. MMC Valves Param block mask for the FPGA implementation. Highlighting the Fault Tab.

Name		Description	Unit	Admissible Values
Clear temporary fault		This parameter sets if the faults are latched or not. It means if once a SM is in fault it will kept this state even if the fault generation signal is disabled. If not checked, all SM faults will be latched. If checked, all currently non-active faults will be cleared	N/A	{Checked, Unchecked}
Show fault set port		This parameter configures if the SetFault port appears or not on the inputs of the block.	N/A	{Checked, Unchecked}
Set Fault		This parameter sets how the faults generated on the block connected to the input FaultSet are assigned to the SMs in the valves. The possible options are : 0: No fault → Does not assign faults to any SM. 1: fault on valve 0 only → This option assigns the fault only to the SMs in the valve 0 (first valve). 2: identical fault on all valves → This option assigns the same fault only to all the valves 3: fault on different valves → This option assigns different faults to different valves. How this is assigned is set in the parameter Valve0 to Valve11.	N/A	{0: No fault, 1: fault on valve 0 only, 2: identical fault on all valves, 3: fault on different valves}
Valve 0 ... Valve 11	Fault 0	Sets if the fault type "Fault 0"	N/A	{Checked, Unchecked}
	Fault 1	Sets if the fault type "Fault 1"	N/A	{Checked, Unchecked}
	Fault 2	Sets if the fault type "Fault 2"	N/A	{Checked, Unchecked}

CR discrepancy Tab

This tab sets the parameters to generate discrepancies on the SM parameters, i.e. to generate differences in the values of capacitance and resistance on each SM.

Figure 10. MMC Valves Param block mask for the FPGA implementation. Highlighting the CR discrepancy Tab.

Name

Description

Unit

Admissible Values

Parameter discrepancy range

Sets the range and resolution for the discrepancies between SMs in the same valve. The available options are:

0: No discrepancy
1: max error +/-1 p.u. resolution 0.78%
2: max error +/-0.5 p.u. resolution 0.39%
3: max error +/-0.25 p.u. resolution 0.2%

Depending on the option no discrepancy is applied to the SMs or the values taken from the Parameter discrepancy data are taken into account approximating to the nearest acceptable value according to the resolution and maximum error settings.

N/A

{0: No discrepancy ,

1: fault on valve 0 only,

2: max error +/-0.5 p.u. resolution 0.39%,

3: max error +/-0.25 p.u. resolution 0.2%}

Parameter discrepancy data

Defines the discrepancies data that can be applied to the SMs. This is a matrix of depth_paradisc columns and dimen_paradisc rows. The number of columns (depth_paradisc) must be less than 12, and the number of rows (dimen_paradisc) could be as maximum equal to the number of SMs per valve.

Each of the columns represent a pattern of differences between SMs that can be applied to each valve. Each of the rows indicates the individual value for each SM. The values are defined as a discrepancy between the nominal value and the real value of the parameter in the SM.

Each element in the matrix is defined as where is the discrepancy value for a i-th SM, is the nominal value of the SM (SM capacitance and SM normal and fast discharge resistance parameters), and is the actual value applied to the SM. This value is rounded to the closest acceptable value according to the resolution set in the Parameter discrepancy range parameter.

N/A

[-1,1] for each element in the matrix

Discrepancy pattern for SM capacitance / resistance

Pattern in valve 0 .... valve 11

Applies the corresponding pattern from the Parameter discrepancy data matrix to the valve. The user can select one from the 12 possible patterns. If the discrepancy matrix has less columns than the selected pattern, no discrepancy is applied.

The selected pattern is applied to the first n SMs in the valve, being n the number of rows in the discrepancy matrix. The rest of SMs in the valve are set with the nominal value.

N/A

{0: no discrepancy,

1: parameter discrepancy pattern1,

2: parameter discrepancy pattern2,

3: parameter discrepancy pattern3,

4: parameter discrepancy pattern4,

5: parameter discrepancy pattern5,

6: parameter discrepancy pattern6,

7: parameter discrepancy pattern7,

8: parameter discrepancy pattern8,

9: parameter discrepancy pattern9,

10: parameter discrepancy pattern10,

11: parameter discrepancy pattern11,

12: parameter discrepancy pattern12}

Inputs

The block has two optional inputs that only visible if the Model Type is selected as FPGA and the corresponding options have been activated. In the following table both ports are described.

Name	Description	Unit	Admissible Values
FaultSet	This port is only visible if the Show fault set port parameter has been checked. It allows to set faults in the SMs in the FPGA.	N/A	N/A
SMgSet	This port is only visible if the Show external SM gate set port parameter has been checked. It allows to send SM gating signals to the FPGA from the console.	N/A	N/A

Outputs

Name	Description	Unit	Admissible Values
MMCPara	It is a bus signal that contains the parameters for the MMC valves. The output of this bus must be connected directly to the corresponding MMC Valves Low Level Control Block and MMCValves Block in the model.	N/A	N/A

Examples

MMC Point to Point HVDC link (HVDC Point-to-Point Link with two MMCs): In this example see how to use the MMC Valves Parameter block to set the parameters of the MMC Low Level Control and MMC Valves blocks to implement a monopolar HVDC link with two MMCs

Limitations

The type of model implementation (CPU or FPGA) cannot be changed online. Each time the model type changes, the model must be recompiled.

Version History

This block has been introduced in MMC 2.10.0

MMC User Documentation

MMC Valves Parameters Block

Description

Mask and Parameters

General Parameters

CPU Model Parameters

Model Tab

Operation Tab

Control Tab

FPGA Model Parameters

Model Tab

Operation Tab

Control Tab

Protection Tab

Scope Tab

Fault Tab

CR discrepancy Tab

Inputs

Outputs

Examples

Limitations

Version History

See Also