OP5330 DB37F Pin Assignment

The following tables provide the general pin assignments for the OP5330 DB37 connectors.

Detailed pin assignments for all connectors can be found in the System Description document provided with your order, or refer to the general pin assignment of your specific unit.

Before designing cables, OPAL-RT recommends using the guideline Simulator EMC cable recommendations.

Group A and B - P1 - Channel 00 to 15 (Connector P2 not used)
DB37F Pin	Assignment	DB37F Pin	Assignment
1	+AOUT00	20	GND
2	+AOUT01	21	GND
3	+AOUT02	22	GND
4	+AOUT03	23	GND
5	+AOUT04	24	GND
6	+AOUT05	25	GND
7	+AOUT06	26	GND
8	+AOUT07	27	GND
9	+AOUT08	28	GND
10	+AOUT09	29	GND
11	+AOUT10	30	GND
12	+AOUT11	31	GND
13	+AOUT12	32	GND
14	+AOUT13	33	GND
15	+AOUT14	34	GND
16	+AOUT15	35	GND
17	Refer to unit’s pin assignment*	36	Refer to unit’s pin assignment*
18	Reserved	37	Reserved
19	Refer to unit’s pin assignment*

* Unit can be a Real-time Simulator or an FPGA Processor and IO Expansion Unit from the OP4000 or the OP5000 series.