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OP5352 DB37F Pin Assignment

The following tables provide the general pin assignments for the OP5352 DB37 connectors.

Detailed pin assignments for all connectors can be found in the System Description document provided with your order, or refer to the general pin assignment of your specific unit.

Before designing cables, OPAL-RT recommends using the guideline Simulator EMC cable recommendations.

Group A and B - Connector P1 - Channel 00 to 15

 

 

OP5352 DB37F Pin Assignment

 

Group A and B - P2 Connector - Channel 16 to 31

DB37F Pin

Assignment

DB37F Pin

Assignment

DB37F Pin

Assignment

DB37F Pin

Assignment

1

+DOUT00

20

GND_ISO**

1

+DOUT16

20

GND_ISO

2

+DOUT01

21

GND_ISO

2

+DOUT17

21

GND_ISO

3

+DOUT02

22

GND_ISO

3

+DOUT18

22

GND_ISO

4

+DOUT03

23

GND_ISO

4

+DOUT19

23

GND_ISO

5

+DOUT04

24

GND_ISO

5

+DOUT20

24

GND_ISO

6

+DOUT05

25

GND_ISO

6

+DOUT21

25

GND_ISO

7

+DOUT06

26

GND_ISO

7

+DOUT22

26

GND_ISO

8

+DOUT07

27

GND_ISO

8

+DOUT23

27

GND_ISO

9

+DOUT08

28

GND_ISO

9

+DOUT24

28

GND_ISO

10

+DOUT09

29

GND_ISO

10

+DOUT25

29

GND_ISO

11

+DOUT10

30

GND_ISO

11

+DOUT26

30

GND_ISO

12

+DOUT11

31

GND_ISO

12

+DOUT27

31

GND_ISO

13

+DOUT12

32

GND_ISO

13

+DOUT28

32

GND_ISO

14

+DOUT13

33

GND_ISO

14

+DOUT29

33

GND_ISO

15

+DOUT14

34

GND_ISO

15

+DOUT30

34

GND_ISO

16

+DOUT15

35

GND_ISO

16

+DOUT31

35

GND_ISO

17

Refer to unit’s pin assignment*

36

Refer to unit’s pin assignment*

17

Refer to unit’s pin assignment*

36

Refer to unit’s pin assignment*

18

Reserved

37

Reserved

18

Reserved

37

Reserved

19

Refer to unit’s pin assignment*

 

 

19

Refer to unit’s pin assignment*

 

 

* Unit can be a Real-time Simulator or an FPGA Processor and IO Expansion Unit from the OP4000 or the OP5000 series.
** GND_ISO: Isolated ground

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