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HYPERSIM Release Notes: 2022.1
Page Content
- 1 HYPERSIM
- 2 I/O Interfaces
- 2.1 General
- 2.2 IEC 61850
- 2.3 Modbus Master
- 2.4 OPAL-RT Board
- 3 FPGA-Based Simulation
HYPERSIM
Added
Added the ability to simultaneously run 2 or more instances of HYPERSIM on the host PC
Added a license for PSCAD Import available to all users
Added a license for PSS®E Import available to all users
Added a model to the Target Inputs and Outputs Library:
Target I/O Interface to help visualize and simplify the management of I/O connections in the schematic
Added models to the Control Protection Relay Library:
Added new Example models:
Renewable Energy: MicroGrid Droop Control which demonstrates the Islanded Operation of an Inverter-based Microgrid Using a Droop Control Technique
IO Interfaces: MuSE Example Project with the OP5033 which shows how MuSE can easily expand I/O capability by connecting multiple FPGA-based I/O expansion chassis
IO Interfaces: Added MMS Support and the IO Interface component to the IEC61850 Sync1588 Example Model
Added the following Python API commands:
getMonitoringValue which returns the current value of the specified, actively running Monitor Block
getMonitoringAllValues which returns the current value of all actively running Monitor Blocks
Added a new Warning for devices that are missing sensors
Added a "Select/Deselect All" option for Record in Sensors Summary Form
Added the ability to lock a model when a second user opens the same model when more than one instance of HYPERSIM is running
Added a Transformer Data tab in the Z-Based Transformer Parameter form that enables users to automatically generate parameters from manufacturer specifications
Added FPGA details and a refresh button to the Target Information window that returns FPGA card type and Chassis ID
Improved
Improved the simulation startup time for large models
Improved the Sensor Management workflow
Improved Simulation Settings window with a cleaner interface, and additional information such as the Target Architecture
Improved error messages:
related to RPC timeouts by giving more specific information and additional details
when a user attempts to start or apply a Target when the license (Host and/or Target) is invalid or missing
Improved battery current measurement from bundle to output pin which will improve stability
Fixed
Fixed .oprec opening error when double-clicking on the file
Fixed signal group returning to the default value when clicking on record in sensor summary view
Fixed issue in Export Project Wizard where not all sensor configuration files were listed
Fixed issue where localhost would sometimes not initialize due an IP address conflict
Fixed naming of the output current and input voltage in the "Controlled V Source, series" to help address stability issues in models using this component
Removed
Removed Samba dependencies
Removed export as JPG in ScopeView (image export only supports *.png)
I/O Interfaces
General
Added jitter detection mechanism during idle time (hardware and software sync)
Improved I/O Configuration UI:
Added filter columns on table of any configuration page
Fixed reorder columns on any configuration page
Removed the "Add above" button and simplified additions in lists by reducing insertion buttons to just 1
Improved the handling time of large configurations
Improved the configuration of the collapsed tree state following a refresh
IEC 61850
Added a new I/O interface with support for IEC 61850 MMS protocol
Added conversion wizard to port legacy configuration and connections to the new interface
Fixed use on non-English Windows PCs
Fixed microsecond value placed in GOOSE packets when using the automatic clock detection mechanism
Modbus Master
Added the triggered read/write functionality
Fixed byte ordering when reading float values
OPAL-RT Board
Added support for new mezzanine OP5360-3
Added BETA support for new mezzanines OP5367-1, OP5367-3, OP5367-5
Fixed use of PWM Synchronize AIn (RCP) on OPAL-RTLinux systems
Fixed TSDIN performance issues
Fixed overruns occurring due to remotes not having output connections
Fixed incompatibility between the Fast Scope FPGA and Default Output Values (DOV) features
Fixed board ID validation issues for threshold (OP5369) and multi-rate (OP5030-#) configuration on remotes
FPGA-Based Simulation
More detailed list of release notes are available at C:\OPAL-RT\eFPGASIM\v2.9.5.61\Docs\ReleaseNotes
Added support for ROff in all switch-based components
Added support for Solver settings, ability to select Node Analysis method and validate any circuit component compatibility
Added support for three new solver settings in eHS Gen5 : Discretization Method, Backward Euler and ART 5
Added support for 2MSPS sampling rate for analog outputs in standard firmware
Added support for initial state in capacitors and inductors in eHS Gen5
Added support for active low gate polarity in eHS Gen5
Fixed LCA in eHS Gen 4
Fixed resolver connection to external excitation in Generic Machine block
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