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FPGA 64-to-64 Interconnect Controller Panel - efs_cpuInterconnect64ControlPanel
Description
This block is used to specify the interconnection information for the FPGA 64-to-64 Interconnect Controller block.
Mask Parameters
Available Signal Name list:This parameter is used to set the available signal names in the drop-down lists. It should be identical to the "SelectedSignals" parameter of the corresponding FPGA 64-to-64 Interconnect block in the firmware RT-XSG model.
Selected Signal Name List:This parameter is used to set the name of the subsequent drop-down selection titles.
SW01 signal selection from bus: Set the interconnection information by selecting a signal from this drop-down list.
Inputs
This block has no input.
Outputs
InterconnectCfg: This signal contains the interconnection information. It should be connected to the input of a "FPGA 64-to-64 Interconnect Controller" block.
Characteristics and limitations
This block has no special characteristics.
Direct Feedthrough | NO |
Discrete sample time | YES |
XHP support | YES |
Work offline | N/A |
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