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FPGA PI Controller - efs_cpuPI
Description
This block is used to transmit parameters to an FPGA-based PI Controller.
Mask Parameters
Sample Time: This parameter sets the sample time of the controller, in seconds.
Initial output: This parameter sets the integrator initial condition.
OpCtrl/OpLnk Controller Name: Binds this block to an OpCtrl block by entering the same 'Controller Name' as specified in the OpCtrl block The OpCtrl block controls initialization of the settings of one specific card in the system.
LoadIn port number for PI parameters: This parameter should reflect the communication port used to send parametrization data to the controller. Refer to the firmware documentation to know how to set this parameter.
DataIn port number for PI reference: This parameter should reflect the communication port used to send the reference value of the controller. Refer to the firmware documentation to know how to set this parameter.
DataOut port number for PI response monitoring: This parameter should reflect the communication port used to receive the response of the controller. Refer to the firmware documentation to know how to set this parameter.
Inputs
s_ref: This input is the reference value for the input signal of the controller.
Kp: This input is the Kp gain of the controller.
Ki: This input is the Ki gain of the controller. The integration is done using the backward-Euler technique.
SaturationHigh: This input is the top saturation value of the controller output and integrator state variable.
SaturationLow: This input is the bottom saturation value of the controller output and integrator state variable.
Outputs
Response: This output is the control variable of the controller.
Characteristics and limitations
Direct Feedthrough | NO |
Discrete sample time | YES |
XHP support | YES |
Works offline | NO |
If you require more information, please contact https://www.opal-rt.com/contact-technical-support/.
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