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Common Encoder In




The Encoder In block is used to retrieve Angle and Rate values from quadrature signals (A, B, and the index signal Z) connected to digital input lines of a carrier connected to an FPGA card.

The angle value is transferred from the FPGA to the RT-LAB model through the DataOut port allocated to the Encoder In, via the PCIe bus of the target computer; the rate is processed by the Encoder In block through differentiation.

Each FPGA bitstream using digital input channels comes with a configuration file; this file lists the Data port number and their corresponding carrier location in the system. The configuration file name is the same as the bitstream file name entered in the OpCtrl block, with the extension .conf instead of .bin.

This configuration file uses three parameters to describe the selection of the carrier channels:

  • the Slot number (in the range 1 to 4) is the slot of the backplane connected to the system in which the carrier is installed,
  • the Section A or B is a subset of 32 lines of the carrier. For example, with the 32 In/32Out OP4510 carrier, section A refers to the 32 input lines and section B to the 32 output lines,
  • the Sub-Section, 1 to 4, is a subset of 8 data values connected to the port: subset 1 returns values for the 8 first channels of one section of the carrier, subset 2 returns values for the 8 next channels, etc.

The user must refer to the configuration file for selecting the port number for the desired digital input channels. The Encoder In block then parses the configuration file and displays the Slot, Section and Sub-section values corresponding to the port number in the 'Slot infos' parameter.

The DataOut ports connected to Quadrature Encoder input signals are identified by the acronym 'QEI' in the configuration file.

The maximum number of digital input channels controlled by one Encoder In is limited by the size of the subset of channels in one sub-section, which is fixed to 2 in the current implementation.


ControllerNameBind this block to an OpCtrl block by entering the same 'Controller Name' as specified in the OpCtrl block The OpCtrl block controls initialization of the settings of one specific FPGA card in the system.
DataOut port numberSet the number of the DataOut port to be controlled by this block, in the range [1:64] for the VC707 and TE0741 FPGAs and [1:32] for all others.
Slot infosThis non-editable parameter displays the physical location of the digital input channels related to the selected DataOut port, as obtained from the parsing of the configuration file.
Available channelsThis non-editable parameter specifies the maximum number of quadrature encoder input values returned by the DataOut port as defined in the RT-XSG bitstream. Each quadrature encoder input value comes from the decoding of a set of A, B and Z input signals.
Number of Encoder SignalsSet the number of quadrature encoder input values to be returned by the block. The value must be less than or equal to the value of the 'Available channels' parameter.
Auxiliary Output typeSelect the type of the second output. Raw stands for raw data received from FPGA and Angle for the current angle value.
Rate UnitSelect between Hz and RPM (Revolution per Minute).
Angle UnitWhen the 'Auxiliary output' parameter is set to 'Angle', this parameter is editable. Three units are available for angle: degree, radian and revolution.
Sample time (s)This parameter allows the user to specify the block sample time in seconds. The default value is 0, which specifies a continuous sample time (note that the sample time is borrowed from the separated subsystem) while -1 specifies an inherited sample time. A functionality block and its associated controller block must execute at the same sample time.
ResolutionThis parameter stands for the number of cycles of the A and B signals per revolution. It is necessary to set this parameter to the right value to get a good estimation of rate.
Clockwise rotationThis parameter is used to decode the direction of rotation.
Minimal rateThis parameter is used to detect the null rate. Under this value, Rate is assumed to be null. This parameter uses the unit specified by 'Rate Unit'.


This block has no inputs


The block has three (3) outports.

RateThis outport returns the rate of the quadrature input signals decoded by the RT-XSG bitstream. The unit (Hz or RPM) is determined by the setting of the 'Rate unit' parameter.
DataThis outport is the 'Auxiliary Output' mentioned in the parameters list. It returns either the raw 16bit data which is the result of the decoding of the quadrature input signals in the RT-XSG bitstream, or the Angle values derived from these raw data. The Angle unit is determined by the setting of the 'Angle Unit' parameter.
StatusThe Status output returns the following values:
DirectionThe Direction output returns 0 for null rate, +1 for positive rate and -1 for negative rate.

0No error.

Block could not be matched with an OpCtrl block (check the 'controller Name' value), or FPGA card initialization problem.

-2Data reception timeout. This error can be caused by model synchronization errors,

Data reception error : the block received less data from the FPGA card than the value specified in the 'Data outport width' parameter. Missing data were replaced by 0.


Data reception error : the block received more data from the FPGA card than the value specified in the 'Data outport width' parameter. Extra data were discarded.

Characteristics and Limitations

Rate precision: The rate precision depends on the version of RT-XSG used to generate the bitstream. With a bitstream generated with a version before 2.2.0, the precision of the Rate values returned by the block is limited by the sampling rate of the model. This is due to the fact that the RT-XSG bitstream returns one Angle value per calculation step, and the Rate calculation is derived from the variation of the Angle value between consecutive steps.

Since RT-XSG 2.2.0, the speed is calculated as a number of events on signals A and B, between two consecutive timestamps. From with bitstreams generated with version of RT-XSG 2.2.0 or later versions, the rate precision is 10 nanoseconds.

The version of RT-XSG used to generate the bitstream is part of the bitstream name.

Direct FeedthroughNo
Discrete sample timeYes
XHP supportYes
Work offlineNo

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