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Common Digital In

Block

Mask

Description

The Digital In block is used to return 0/1 data values obtained from the digital input channels of OP5353 module(16 Digital In conditioning module) installed different type of carrier compatible with the selected FPGA board.

The data values are transferred from the FPGA to the RT-LAB model through one DataOut port of the bitstream, via the PCIe bus of the target computer.

Each bitstream using Digital Input channels comes with a configuration file which lists the Data port number and the corresponding OP5353 location in the system. The configuration file name is the same as the bitstream file name entered in the OpCtrl block, with the extension .conf instead of .bin. This configuration file uses different parameters to describe the location of the OP5353 channels, depending on the FPGA associated to the controller they are attached to:

BoardConfiguration
OP5142

The slot number ranges from 1 to 4. Each slot has two modules (i.e. two cards).

The module (A or B) is the location of the card on the carrier. Module 'A' refers to the card at the front of the simulator and module 'B' refers to the card at the back of the simulator for the slot in question.

The subsection ranges from 1 to 4. It is a subset of 8 channels for the card in question.

Subsection 1 = returns channels 00 to 07

Subsection 2 = returns channels 08 to 15

Subsection 3 = returns channels 16 to 23

Subsection 4 = returns channels 24 to 31

ML605

The slot number ranges from 1 to 4. Each slot has two modules (i.e. two cards).

The module (A or B) is the location of the card on the carrier. Module 'A' refers to the card at the front of the simulator and module 'B' refers to the card at the back of the simulator for the slot in question.

The subsection ranges from 1 to 4. It is a subset of 8 channels for the card in question.

Subsection 1 = returns channels 00 to 07

Subsection 2 = returns channels 08 to 15

Subsection 3 = returns channels 16 to 23

Subsection 4 = returns channels 24 to 31

OP7160/OP7161

The slot number ranges from 1 to 16. Each slot has one module (one card).

The Section A or B is obsolete for OP7000 I/O box.

The subsection ranges from 1 to 4. It is a subset of 8 channels for the card in question.

Subsection 1 = returns channels 00 to 07

Subsection 2 = returns channels 08 to 15

Subsection 3 = returns channels 16 to 23

Subsection 4 = returns channels 24 to 31

VC707The slot number ranges from 1 to 4. Each slot has two modules (i.e. two cards).
The module (A or B) is the location of the card on the carrier. Module 'A' refers to the card at the front of the simulator and module 'B' refers to the card at the back of the simulator for the slot in question.

The subsection ranges from 1 to 4. It is a subset of 8 channels for the card in question.

Subsection 1 = returns channels 00 to 07

Subsection 2 = returns channels 08 to 15

Subsection 3 = returns channels 16 to 23

Subsection 4 = returns channels 24 to 31

OP4500/TE0741The slot number ranges from 1 to 2. Each slot has two modules (i.e. two cards).
The module (A or B) is the location of the card on the carrier. Seen from the back of the simulator, the module 'A' is the leftmost card on the corresponding group and module 'B' is the right-most card.

The subsection ranges from 1 to 4. It is a subset of 8 channels for the card in question.

Subsection 1 = returns channels 00 to 07

Subsection 2 = returns channels 08 to 15

Subsection 3 = returns channels 16 to 23

Subsection 4 = returns channels 24 to 31

The user must refer to the configuration file (opened with any text editor) for selecting the DataOut port number for the desired Digital Input channels. The Digital In block then parses the configuration file and displays the Slot, Section and Sub-section values corresponding to the DataOut port number in the 'Slot infos' parameter.

The maximum number of Digital Input channels controlled by one Digital In is limited by the size of the subset of channels in one sub-section. This number can vary between 1 and 32 and is usually set to 8.

Parameters

ControllerNameBind this block to an OpCtrl block by entering the same 'Controller Name' as specified in the OpCtrl block The OpCtrl block controls initialization of the settings of one specific FPGA card in the system.
DataOut port numberEnter the number of the DataOut port to be controlled by this block, in the range [1:64] for the VC707 and TE0741 FPGAs and [1:32] for all others
Slot infosThis non-editable parameter displays the physical location of the digital input channels related to the selected DataOut port, as obtained from the parsing of the configuration file.
Maximum number of DIn channels controlled by this blockThis non-editable parameter displays the number of channels in one sub-section listed in the configuration file.
Number of DIn channelsEnter the number of channels for which data values will be returned at each calculation step. This number must be less than or equal to the value of the 'Maximum number of DIn channels' parameter. The data transfer mechanism between RT-LAB and the FPGA card does not allow the selection of individual channels in the sub-section of channels. The data returned by the block will thus correspond to the N first channels of the sub-section, where N is the value of the 'Number of DIn channels' parameter.
Sample Time (s)This parameter allows the user to specify the block sample time in seconds. The default value is 0, which specifies a continuous sample time (note that the sample time is borrowed from the separated subsystem) while -1 specifies an inherited sample time. A functionality block and its associated controller block must execute at the same sample time.

Inputs

This block has no inputs.

Outputs

This block has two ouputs.

Vals: This output returns the 0/1 values of the subset of channels selected.

Status: This output returns the following values:

ValueDescription
0No error.
-1

Block could not be matched with an OpCtrl block (check the 'controller Name' value), or FPGA card initialization problem.

-2Data reception timeout. This error can be caused by model synchronization errors.
-3

Data reception error : the block received less data from the FPGA card than the value specified in the 'Data outport width' parameter. Missing data were replaced by 0.

-4

Data reception error : the block received more data from the FGA card than the value specified in the 'Data outport width' parameter. Extra data were discarded.

Characteristics and Limitations

Connector Pin Assignments

The user should refer to the carrier documentation for connector pin assignments.

Direct FeedthroughNo
Discrete sample timeYes
XHP supportYes
Work offlineNo

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