Block

Mask

Description

The Analog In block is used to return analog input acquisition data obtained from the analog input channels of an OP5340 module installed on a different type of carrier compatible with the selected FPGA board.

The data values are transferred from the FPGA to the RT-LAB model through one DataOut port of the bitstream, via the PCIe bus of the target computer.

Each bitstream using Analog Input channels comes with a configuration file which lists the Data port number and the corresponding OP5340 modules location in the system. The configuration file name is the same as the bitstream file name entered in the OpCtrl block, with the extension .conf instead of .bin. This configuration file uses different parameters to describe the location of the OP5340 channels, depending on the FPGA associated with the controller they are attached to:

Board	Configuration
OP5142	The slot number ranges from 1 to 4. Each slot has two modules (i.e. two cards).
	The module (A or B) is the location of the OP534X card on the carrier. Module 'A' refers to the card at the front of the simulator and module 'B' refers to the card at the back of the simulator for the slot in question.
	The subsection (1 or 2), is a subset of channels for the card in question. Subsection '1' returns values for the 8 first channels of the OP534X, and subsection '2' returns values for the 8 last channels.
ML605	The slot number ranges from 1 to 4. Each slot has two modules (i.e. two cards).
	The module (A or B) is the location of the OP534X card on the carrier. Module 'A' refers to the card at the front of the simulator and module 'B' refers to the card at the back of the simulator for the slot in question.
	The subsection (1 or 2), is a subset of channels for the card in question. Subsection '1' returns values for the 8 first channels of the OP534X, and subsection '2' returns values for the 8 last channels.
OP7160/OP7161	The slot number ranges from 1 to 16. Each slot has one module (one card).
	Section A or B is obsolete for OP7000 I/O box.
	The subsection (1 or 2), is a subset of channels for the card in question. Subsection '1' returns values for the 8 first channels of the OP534X, and subsection '2' returns values for the 8 last channels.
VC707	The slot number ranges from 1 to 4. Each slot has two modules (i.e. two cards).
	The module (A or B) is the location of the OP534X card on the carrier. Module 'A' refers to the card at the front of the simulator and module 'B' refers to the card at the back of the simulator for the slot in question.
	The subsection (1 or 2), is a subset of channels for the card in question. Subsection '1' returns values for the 8 first channels of the OP534X, and subsection '2' returns values for the 8 last channels.
OP4500/TE0741	The slot number ranges from 1 to 2. Each slot has two modules (i.e. two cards).
	The module (A or B) is the location of the OP534X card on the carrier. Seen from the back of the simulator, the module 'A' is the leftmost card on the corresponding group and module 'B' is the right-most card.
	The subsection (1 or 2), is a subset of channels for the card in question. Subsection '1' returns values for the 8 first channels of the OP534X, and subsection '2' returns values for the 8 last channels.

The user must refer to the configuration file (opened with any text editor) for selecting the DataOut port number for the desired Analog Input channels. The Analog In block then parses the configuration file and displays the Slot, Section and Sub-section values corresponding to the DataOut port number in the 'Slot infos' parameter.

The maximum number of Analog Input channels controlled by one Analog In is limited by the size of the subset of channels in one sub-section, usually 8.

Parameters

ControllerName	Bind this block to an OpCtrl block by entering the same 'Controller Name' as specified in the OpCtrl block. The OpCtrl block controls initialization of the settings of one specific FPGA card in the system.
DataOut port number	Enter the number of the DataOut port to be controlled by this block, in the range [1:64] for the VC707, TE0741 and OP48xx FPGAs and [1:32] for all others.
Slot infos	This non-editable parameter displays the physical location of the analog input channels related to the selected DataOut port, as obtained from the parsing of the configuration file.
Maximum number of AIn channels controlled by this block	This non-editable parameter displays the number of channels in one sub-section listed in the configuration file.
Number of AIn channels:	Enter the number of channels for which data values will be returned at each calculation step. This number must be less than or equal to the value of the 'Maximum number of AIn channels' parameter. The data transfer mechanism between RT-LAB and the FPGA card does not allow the selection of individual channels in the sub-section of channels. The data returned by the block will thus correspond to the N first channels of the sub-section, where N is the value of the 'Number of AIn channels' parameter.
Sample Time (s)	This parameter allows the user to specify the block sample time in seconds. The default value is 0, which specifies a continuous sample time (note that the sample time is borrowed from the separated subsystem) while -1 specifies an inherited sample time. A functionality block and its associated controller block must execute at the same sample time.

Inputs

This block has no inputs.

Outputs

This block has two outputs.

Volts: This output returns the acquisition data, in Volts, of the subset of channels selected. The voltage range supported by the channels of the OP5340 module is [-16; +16] volts.

Status: This output returns the following values:

Value	Description
0	No error.
-1	Block could not be matched with an OpCtrl block (check the 'controller Name' value), or FPGA card initialization problem.
-2	Data reception timeout. This error can be caused by model synchronization errors,
-3	Data reception error: the block received fewer data from the FPGA card than the value specified in the 'Data outport width' parameter. Missing data were replaced by 0.
-4	Data reception error: the block received more data from the FPGA card than the value specified in the 'Data outport width' parameter. Extra data were discarded.

Characteristics and Limitations

Connector Pin Assignments:

The user should refer to the carrier documentation for connector pin assignments.

Direct Feedthrough	No
Discrete sample time	Yes
XHP support	Yes
Work offline	No

RT-LAB Documentation

Common Analog In