Block

Mask

Description

The TSB In block is used to return firing pulses data measured at the digital input channels of a carrier connected to an FPGA.

The data values are transferred from the FPGA to the RT-LAB model through one DataOut port of the bitstream, via the PCIe bus of the target computer. They are then processed in the TSB In block and returned in a RTE output compatible with the digital input of the RT-Events TSB blocks.

Each FPGA bitstream that implements the TSBIn feature comes with a configuration file which lists the Data port number and the corresponding carrier location in the system. The configuration file name is the same as the bitstream file name entered in the OpCtrl block, with the extension .conf instead of .bin.

This configuration file uses three parameters to describe the location of the channels of the carrier:

the Slot number (in the range 1 to 4) is the slot of the backplane connected to the system in which the carrier is installed,
the Section A or B is a subset of 32 lines of the carrier. For example, with the 32 In/32Out OP4510 carrier, section A refers to the 32 input lines and section B to the 32 output lines,
the Sub-Section, 1 to 4, is a subset of 8 channels connected to one DataOut port: subset 1 represents the 8 first channels of one section of the carrier, subset 2 represents the 8 next channels, etc.

The user must refer to the configuration file (opened with any text editor) for selecting the DataOut port number connected to the desired digital input channels. The DataOut ports returning TSBIn data are presently indicated by the feature 'TOM' in the configuration file. The TSBIn block then parses the configuration file and displays the Slot, Section and Sub-section values corresponding to the DataOut port number in the 'Slot infos' parameter.

The maximum number of digital input channels controlled by one TSBIn is limited by the size of the subset of channels in one sub-section which is fixed to 8 in the current implementation.

Parameters

ControllerName	Bind this block to an OpCtrl block by entering the same 'Controller Name' as specified in the OpCtrl block The OpCtrl block controls initialization of the settings of one specific FPGA in the system.
DataOut port number	Enter the number of the DataOut port to be controlled by this block, in the range [1:64] for the VC707 and TE0741 FPGAs and [1:32] for all others.
Slot infos	This non-editable parameter displays the physical location of the digital input channels related to the selected DataOut port, as obtained from the parsing of the configuration file.
Maximum number of TSBIn channels controlled by this block	This non-editable parameter displays the number of channels in one sub-section listed in the configuration file.
Number of TSBIn channels	Enter the number of channels for which data values will be returned at each calculation step. This number must be less than or equal to the value of the 'Maximum number of TSBIn channels' parameter. The data transfer mechanism between RT-LAB and the FPGA does not allow the selection of individual channels in the sub-section of channels. The data returned by the block will thus correspond to the N first channels of the sub-section, where N is the value of the 'Number of TSBIn channels' parameter.
Sample Time (s)	This parameter allows the user to specify the block sample time in seconds. The default value is 0, which specifies a continuous sample time (note that the sample time is borrowed from the separated subsystem) while -1 specifies an inherited sample time. A functionality block and its associated controller block must execute at the same sample time.
Output signal type	Select the signal type for the values: RTE (RT-Events signal) or double.

Inputs

This block has no inputs.

Outputs

This block has two outputs.

Values: This output returns the processed firing pulses data in RTE signal format when the output signal type is set to RTE. The output can be directly connected to the digital input of RT-Events TSB blocks. If the output signal is 'double', the output could be used directly as double signal.

Status: This output returns the following values:

Value	Description
0	No error.
-1	Block could not be matched with an OpCtrl block (check the 'controller Name' value), or FPGA initialization problem.
-2	Data reception timeout. This error can be caused by model synchronization errors,
-3	Data reception error : the block received less data from the FPGA than the value specified in the 'Data outport width' parameter. Missing data were replaced by 0.
-4	Data reception error : the block received more data from the FPGA than the value specified in the 'Data outport width' parameter. Extra data were discarded.

Characteristics and Limitations

Connector Pin Assignments

The user should refer to the documentation of the carrier for connector pin assignments.

This block works properly if the timestep is under 160 µs.

Direct Feedthrough	No
Discrete sample time	Yes
XHP support	Yes
Work offline	No

RT-LAB Documentation

Common TSB In