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Digital Output Mapping
Block
Description
This block is used to map multiple digital sources to one digital output.
It receives up to 8 words of 32 bits that can be mapped to any of the 32 outputs bits.
The configuration is sent from the CPU, where mapping and polarity can be configured.
Inputs
loadIn: This port allows the configuration of the block when using a specific configuration structure. The LoadIn signal should be connected to a RT-XSG LoadIn port. Port data type is UFix_33_0.
loadInSof:This port is the Start of Frame signal of the RT-XSG LoadIn port. Port data type is UFix_1_0.
reset: This input must be a Bool signal. When active, the internal configurations are reset to their initial condition.
Input 0-7: These inputs must be connected to a UFix32_0.
Outputs
Output: This output UFix32_0 to be connected to digital output block .
Characteristics and limitations
Direct Feedthrough | NO |
Discrete sample time | YES |
XHP support | N/A |
Work offline | YES |
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