Description

This block implements a filter to select through a FLWS bus useful signals by filtering the input frame. These signals are flagged to increment a local generated address following the number of input selected.

The block send each data, valid and last for each selected signal and the local address generated.

Inputs

Input Data (DataIn) :  This input must be a XFloat_8_24 signal. It receives the input data signal to be filter.

Input Valid (ValidIn) : This input must be a Bool signal. It receives the input valid signal to be filter.

Input Last (LastIn) : This input must be a Bool signal. It receives the input last signal to be filter.

Load In & Load In Sof (Load In & Load In Start Of Frame) : These load in ports is receive mapping, gain, offset and synchronization configuration from CPU.

Hard Reset :  This input must be a Bool signal. It vehicles the hardreset of the model

Solver Reset :  This input must be a Bool signal. It vehicles the reset from eHS.

Outputs

Output Data (DataOut) :  This output must be a XFloat_8_24 signal. It sends to the output the data of the filtered signal.

Output Valid (ValidOut) : This output must be a Bool signal. It sends to the output the valid of the filtered signal.

Output Last (LastOut) : This output must be a Bool signal. It sends to the output the last of the filtered signal.

Output Address (AddrOut): This output send a local address generated from the number of signals previously filtered.

Reset: This output is the signal used to reset the block. If reset is applied, data coming out of the frame outport should be discarded.

Characteristics and limitations

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