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Dual Resolver Encoder - efsXsgDualResolverEncoder

Block


Table of Contents

Description

This block implements two individual resolver encoder. Both resolver encoder can be used alone or at the same time.


Mask


Inputs

LoadIn: This port allows the configuration of the block when using a specific configuration structure. The LoadIn signal should be connected to a RT-XSG LoadIn port. Port data type is UFix_33_0

LoadIn_SOF: This port is the Start of Frame signal of the RT-XSG LoadIn port. Port data type is UFix_1_0

User_block_index: This port allows multiple dual resolver encoder feature to be connected on the same LoadIn RT-XSG port and using separate parameter sets. If more than one dual resolver encoder block are inside the same model, they will need different block indices. Port data type is UFix_4_0

Theta mec: The mechanical command angle for the resolver. The value range for Theta Mechanical is 0 to 1, 1 being a full rotation i.e. 360 degrees. Port data type is UFix_24_24

External carrier: The carrier signal for the resolver sine and cosine outputs. Port data type is XFloat_8_24

Valid carrier: The valid signal for the external carrier. Port data type is Boolean

Solver_reset: This input provides a reset signal port to reset the solver. The resolver and encoder configurations are not reset. Port data type is Boolean

Reset: This input provides a reset signal port to reset the resolver and encoder configuration and output registers. Port data type is Boolean


Outputs

Angle sensors out: This bus consists of the sine, cosine and carrier signals for both resolvers as well as the angles. Also contains the encoder's A, B and Z signals.


Characteristics and limitations

Direct FeedthroughNO
Discrete sample timeYES
XHP supportN/A
Work offlineNO


If you require more information, please contact https://www.opal-rt.com/contact-technical-support/.

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