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TSDI
Block
Mask
Description
The 8-bit Time-Stamped Digital Inputs block enables the monitoring of events occurring on the digital input pins. The block is able to detect edges on the input signal and to transmit the timestamp of the occurrence of these events to a processing unit. This feature is used to lower the bandwidth needed to transmit high-resolution digital data between computation nodes, comparing to the transmission of the integral raw data.
Parameters
Number of channels (1..8) | This parameter sets the number of channels to monitor. The monitored channel numbers are in the range 1 to the number specified by this parameter. The remaining channels, if any, are disregarded. |
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Signal polarity is set... | This parameter determines the mean by which the signal polarity is set. It can be either set by a block input port or by a block parameter. |
Signal polarity | If the developer chose to specify the polarity as a block parameter, this entry is made available. The value entered should be a string of 0’s and 1’s that correspond to the polarity of each of the input lines, in a little-endian fashion (i.e., from the highest-numbered channel to the lowest-numbered). A ‘0’ for this parameter means that the signal is active-low, which means that a ‘Low’ input voltage is interpreted as a ‘1’ and a ‘High’ input voltage is interpreted as a ‘0’. A ‘1’ for this parameter means that the signal is active-high (default), which means that a ‘Low’ input voltage is interpreted as a ‘0’ and a ‘High’ input voltage is interpreted as a ‘1’. |
Enable digital filtering of pulses | This parameter is used by the developer to enable (default) or disable digital filtering of narrow pulses on the input lines. The digital filter annihilates the effect of glitches on the line but induces a delay equal to the pulse minimum width. |
Pulse minimum width is set... | This parameter is available only if the digital filtering of narrow pulses is activated. It determines the mean by which the pulse minimum width is provided to the digital filters. It can be furnished either from a block input port of by a block parameter. |
Pulse minimum width, in seconds | This parameter is available only if the digital filtering of narrow pulses is activated and the developer has chosen to provide the pulse minimum width by a block parameter. The value corresponds to the pulse minimum width, in seconds (e.g. ‘100e-9’ = 100 nanoseconds, i.e. 10 clock cycles for an FPGA clock of 100MHz), between 0 and 10.23e-6 seconds. |
Type of edges detected is set | This parameter determines the mean by which the types of edges (rising, falling or both) detected are provided to the event detector. It can be either set by a block input port or by a block parameter. |
Detect events on inputs rising edges | This parameter is available only if the type of edges is set to "As a block parameter". This parameter is used to enable the detection of events associated with a low-to-high transition on any input line. |
Detect events on inputs falling edges | This parameter is available only if the type of edges is set to "As a block parameter". This parameter is used to enable the detection of events associated with a high-to-low transition on any input line. |
Generate error on data loss | The developer can use this checkbox to add an output to the block giving an error status related to a loss of data. Data will be lost and this flag activated if more than 512 events are detected between two synchronization (ModelSync) pulses. |
Inputs
HSIn | This signal is a concatenation of all input lines. If the port width is larger than the channel number parameter, the signal MSBs are disregarded. If its width is lower than the channel number parameter, MSBs are padded with zeros. |
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PulseMinWidth | This port is available only if the digital filtering of the pulses is enabled and if the developer has chosen to provide the pulse minimum width from a block input port. The number should be set as an integer number of 10-ns clock periods, between 0 and 1023). |
Polarity | This port is available only if the developer has chosen to provide the signal polarity from a block input port. The vector entered should be a concatenation of 0’s and 1’s that correspond to the polarity of each of the input lines, in a little-endian fashion (i.e., from the highest-numbered channel to the lowest-numbered). A ‘0’ for this parameter means that the signal is active-low, which means that a ‘Low’ input voltage is interpreted as a ‘1’ and a ‘High’ input voltage is interpreted as a ‘0’. A ‘1’ for this parameter means that the signal is active-high (default), which means that a ‘Low’ input voltage is interpreted as a ‘0’ and a ‘High’ input voltage is interpreted as a ‘1’. |
EdgeType | This port is available only if the developer has chosen to provide the type of edges detected from a block input port. The vector entered should be a concatenation of the two types of edges with the least significant bit for falling edges detection (i.e., 1 for falling edges detection, 2 for rising edges detection and 3 for both). |
Outputs
TSDIn | TSDIn packet, intended to be interpreted by the corresponding block in the RT-LAB model. The format of the data is the following, in addition to a 33rd bit set active when a new event is detected and available in the packet (a ‘valid’ bit).
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DataLossError | This output port is the ‘Data loss error’ flag and is available only upon request from the corresponding mask parameter. |
Characteristics and Limitations
This block has no special characteristics or limitations.
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