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Convert Single Floating Point FPGA to Double
Block
Mask
Description
This block converts a single floating-point (FPGA) input from RT-XSG to a standard double number.
It takes a uint32 as the input and returns a double.
Parameters
This block has no parameter.
Inputs
| SFP | This port receives a signal uint32 format, the first bit is for the sign, then there are 8 bits for the exponent and 23 bits for the significand. |
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Outputs
| DBL | This is a signal in the double format from Simulink. |
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Characteristics and Limitations
Vectors are not supported by this block.
| Direct Feedthrough | N/A |
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| Discrete sample time | YES |
| XHP support | YES |
| Work offline | YES |
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