Block

Mask

Description

This block is used to generate a sine/cosine pair of waves. The frequency and amplitude of the waves are set from input ports of the block. The angle progression of the wave can be halted and resumed by using another input to the block.

Parameters

This block has no parameter.

Inputs

step	Represents the frequency expressed in "cycles fraction to add at every clock cycle when the block is enabled". Its value should always be in the range [-0.5, 0.5[, and its maximum resolution is represented by Xilinx System Generator format Fix_42_42.
scale	Represents the peak amplitude of the sine wave. The outputs will be expressed in the Fix_16_10 format, leading to a maximum amplitude of 31.999.
en	Enables the angle integrator. Every clock cycle during which this input is active (1), the angle is incremented with the value present at the "step" input port at that cycle.

Outputs

Sine	The generated sine wave.
Cosine	The generated cosine wave.

Characteristics and Limitations

As an example, if one wants to generate a 5 kHz sine wave, the "step" input could be 5000*1e-6, and "en" input connected to a pulse train that has a period of 1e-6 second. The developer should understand that, depending on the sample rate, this "step" input can be a very small number for frequencies in the range of Hertz/kilohertz. For this reason, a typical format for the "step" input is Fix_32_32, which gives 24 bits of resolution on the frequency around 5 kHz or 17 bits of resolution around 50 Hz.

Direct Feedthrough	N/A
Discrete sample time	N/A
XHP support	N/A
Work offline	YES

RT-XSG Documentation

op_cosin