Block

Mask

Description

The Biss-C Master Unpacking block receives the data from the LoadIn block and recover all signals needed by the Biss Master Communication block (BissMaster). Signal concatenation and reordering is performed inside the block.

Parameters

This block has no parameters.

Inputs

LoadIn	This signal must be connected to one of the Cfg_INi input ports of the LoadIn block.
LoadInSOF	This signal must be connected to one of the SofINi input ports of the LoadIn block.

Outputs

MasterConfiguration	To start the Biss Master configuration (Active High). User has to reset the CPU model and restart the configuration to reconfigure the Biss Master.
AutoGetSensStart	To start the Biss Master data transmission after time out. Master configuration have to be done before start the communication with sensor. 0x01: start communication 0x00: pause 0x10: reset the bus (Init)
RegisterDataFrequency	To configure the register data frequency value. The FREQR value must be between 0 and 7 and the register data frequency is calculated from the equation below.
SensorDataFrequency	To configure the sensor frequency value. The FREQS value must be between 0 and 2⁵ and the sensor data frequency is calculated from the equation below (note that 16 is not permitted and f_CLK correspond to 100 MHz).
AutoGetSensorDataFrequency	To configure the AGS frequency. The maximum value of FREQAGS is 2⁸ and the Auto Get Sensor Frequency is calculated from the equation below.
ENSCD_SCDLEN1	This output is to provide the slave configuration in Single Cycle Data (SCD) configuration.
INVCRC_SCRCPOLY1	This output is to set CRC slave configuration.
SCRCSTART1_BYTE1	This output is to set CRC start value (byte #1).
SCRCSTART1_BYTE2	This output is to set CRC start value (byte #2).

Characteristics and Limitations

This block has no specific characteristics or limitations.